Physical Design Engineer

Altera; Bayan Lepas; On-site; MYR 134,000 - 201,000; Full time

Job summary

Altera in Penang, Malaysia seeks a seasoned Physical Design Engineer to drive complete back-end flows from RTL through GDS for manufacturing. You will handle synthesis, place-and-route, timing closure, clock tree synthesis, and signoff verification with a focus on power, performance, and area.

The role requires 3+ years in physical design, experience with deep submicron nodes, and scripting in Perl/TCL/Python, plus VHDL/Verilog knowledge.

Qualifications

• 3+ years of relevant experience in physical design.
• Tape-out experience in deep submicron process nodes.
• Deep knowledge of physical design flow and EDA tools.
• Hands-on experience with STA/LEC flows and DRC/ERC signoff.
• Proficiency with VHDL/Verilog and scripting languages (Perl/TCL/Python).
• Experience mentoring junior team members and working in diverse teams.

Responsibilities

• Performs physical design implementation from RTL to GDS for manufacturing.
• Executes synthesis, place and route, clock tree synthesis, floor planning, STA, PNR, and power integrity analyses.
• Performs design verification and signoff, including formal equivalence, reliability checks, and layout verification.
• Analyzes results and recommends fixes for current and future architectures.
• Applies expertise in clock design, timing closure, power management, and DFT using standard EDA tools.
• Contributes to design methodology development and flow automation.

Skills

Analytical thinking

Teamwork

Multitasking

Mentoring juniors

Initiative

Education

Bachelor's degree in Computer or Electronic Engineering

Tools

VHDL

Verilog

Perl/TCL/Python

EDA tools

Job description

Job Description

• Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
• Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
• Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
• Analyzes results and makes recommendations to fix violations for current and future product architecture.
• Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
• Optimizes design to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Qualifications

Education Requirements

Bachelor's degree in computer engineering, electronic Engineering or related field.

Minimum Qualifications

3+ years of relevant experience in the following areas:

• Have multiple tape-out experience in deep submicron process nodes
• in depth, extensive knowledge and hands-on experience in physical design flow and relevant EDA tools
• in depth, extensive knowledge and hands-on experience in physical design signoff flow, such as STA flow, LEC flow, ERC flow and DRC flow.
• Hands-on expertise with scripting languages such as Perl, TCL, Python and knowledge of hardware description languages of VHDL and Verilog.
• Experience of mentoring junior team members and charting their development for success.
• Possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment.

Preferred Requirements

• Bachelor or master's degree in computer engineering, Electronic Engineering or related field.
• 3+ years of experience in the following areas:
  • Physical design involving multiple clock domains and clock, power management.
  • Low power design, tools and methodologies. Power intent UPF specifications.

Job Type

Regular

Shift

Shift 1 (Malaysia)

Primary Location

Penang 15, Penang, Malaysia

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.