BIOS - Senior Lead Engineer, Software
Date: Jul 23, 2026
Location: Penang, 07, MY
General Overview
Functional Area: Engineering
Career Stream: Design - Software Engineering
SAP Short Name: SLE-ENG-DSE
Job Level: Level 09
IC/MGR: Individual Contributor
Direct/Indirect Indicator: Indirect
Summary
In this role, the Senior Lead Engineer leads BIOS/system firmware development for Celestica's networking platforms. As the primary firmware responsible for hardware initialization (CPU, memory, PCIe), BIOS is critical to system functionality, security, performance, and reliability. The engineer owns Celestica's implementation of hyperscale customer BIOS requirements on top of silicon vendor and IBV code bases, across both UEFI and Open System Firmware (coreboot/LinuxBoot) stacks, and drives platform boot behavior, hardware error handling, and firmware/BMC interfaces to meet at-scale data center requirements.
Detailed Description
- Lead the design, development and implementation of technical solutions for BIOS/system firmware. Participate in project planning and scheduling.
- Provide technical leadership and direction to a team of engineers. May be a recognized expert (go‑to person) in BIOS or other platform technical areas.
- Review, interpret and may negotiate customer BIOS requirements/specifications, provide customer feedback, and ensure quality of deliverables.
- Maintain the platform BIOS code base against silicon vendor and IBV releases (microcode, ME, and related blobs) and provide version tracking with each release.
- Implement and tune component initialization and BIOS settings across CPU, memory, PCIe, and related subsystems in line with customer platform requirements.
- Own system boot behavior, including network boot (PXE/HTTP over IPv4/IPv6), boot order, boot‑time targets, and BIOS configuration interfaces.
- Deliver BIOS upgrade/downgrade tooling and scriptable in‑band and BMC‑based update flows for at‑scale deployment.
- Implement industry‑standard support (ACPI, SMBIOS) and server management interfaces (SEL, PPIN, IPMI/BMC communication).
- Design and implement platform security features (TPM/TXT, Secure Boot, Boot Guard, measured boot) and associated event logging.
- Lead hardware error handling and RAS implementation (detection, diagnosis, resilience, recovery), including firmware‑first models, and unified SEL error reporting.
- Optimize system power and performance through BIOS tuning (power states, power/frequency capping, performance monitoring enablement).
- Work closely with silicon vendors, IBVs, ODM partners, hardware engineers on board bring‑up, and manufacturing teams on production BIOS and diagnostics support.
- Analyze, design and develop tests and test‑automation suites for BIOS validation.
- Provide ongoing maintenance, support and enhancements in existing platforms.
- Collaborate cross‑functionally with customers, users, project managers and other engineers, including Peer‑Reviews, to achieve elegant solutions.
- Proactively promote and apply industry best practices, and provide recommendations for continuous improvement.
- Hands‑on BIOS/system firmware development experience on UEFI and/or Open System Firmware (coreboot, LinuxBoot, u‑root) stacks.
- Strong programming skills in C, with working knowledge of C++, assembly, Python, and shell.
- Deep understanding of x86 platform bring‑up and silicon initialization (CPU, memory/DDR, PCIe, chipset/PCH, ME) on Intel and/or AMD platforms.
- Familiarity with boot flows and interfaces: PXE/HTTP boot, ACPI, SMBIOS, SMM/SMI, efibootmgr, and BIOS/BMC communication (IPMI, KCS).
- Experience with platform security: TPM, TXT, Secure Boot, Boot Guard, and measured boot.
- Knowledge of hardware RAS and error handling: APEI, PCIe AER, machine check (MCA), and SEL‑based error reporting.
- Strong software and hardware debugging skills; experience with debug tooling such as ITP/JTAG, logic/PCIe analyzers, and POST‑code/debug cards.
- Experience working with silicon vendors, IBVs, ODMs, and cross functional hardware and manufacturing teams.
- Excellent verbal and written communication skills; strong interpersonal, multitasking, and organizational skills.
- Project Management - Ability to lead engineering projects that may involve other functions, with solid understanding of the technical, schedule and people aspects of the project. Able to recognize project barriers and develop mitigation plans.
- The following competencies may also be required: Coaching/Mentoring; Communication/Negotiation/Presentation; Creative Problem Solving; Customer Interaction/Stakeholder Management; Quality & Lean; Working Effectively with Others.
Physical Demands
- Duties of this position are performed in a normal office environment.
- Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data.
- Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.
- Occasional travel may be required.
Typical Experience
Typical Education
Bachelor degree or consideration of an equivalent combination of education and experience.
Educational Requirements may vary by Geography
Notes
This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.
Celestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status (including race, religion, national origin, gender, sexual orientation, age, marital status, veteran or disability status or other characteristics protected by law).
At Celestica we are committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported. Special arrangements can be made for candidates who need it throughout the hiring process. Please indicate your needs and we will work with you to meet them.