Senior SoC Verification Engineer — Pre-Silicon & Debug

3M HEALTHCARE; Región Centro; Presencial; MXN 600.000 - 900.000; Jornada completa

Descripción de la vacante

3M HEALTHCARE in Guadalajara seeks an experienced verification engineer to perform functional verification of an integrated SoC and develop scalable verification environments. You will execute plans, run emulation models, and collaborate with RTL, architecture, and design teams to ensure coverage and security are embedded in pre-silicon workflows.

Requirements include a 5+ year background in hardware verification with Verilog/VHDL, UVM/SystemVerilog, and strong English proficiency; applicants

Formación

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 5+ years of industry experience, or Master's degree with 4+ years of experience.
• 4+ years of experience with hardware description languages such as Verilog or VHDL and verification tools like UVM or SystemVerilog, or relevant experience in silicon validation.
• Experience with simulation or emulation tools, debugging scripts, and functional coverage analysis.
• Advanced English level.
• Unrestricted, permanent right to work in Mexico (no visa or immigration sponsorship available).

Responsabilidades

• Perform functional logic verification of an integrated SoC to meet specifications.
• Define scalable verification plans, test benches, and environments for coverage and microarchitecture specs.
• Execute verification plans; run emulation/system-simulation models to verify design, analyze power and performance.
• Debug issues in pre-silicon environment, implement corrective measures for failing tests.
• Collaborate with SoC architects, RTL developers, and other teams to improve verification of complex features.
• Document test plans and lead technical reviews with design and architecture teams.
• Incorporate security activities within test plans, including regression and debugging tests.
• Maintain and improve existing verification infrastructure and methodology.
• Apply post-silicon learnings to improve pre-silicon validation and update coverage for future products.

Conocimientos

Verilog/SystemVerilog

UVM

Python

C/C++

ARM‑based SoC

Linux/Unix

CI/CD pipelines

Security verification

Regression testing

VCS/Questa/Xcelium

Educación

Bachelor's degree in Electrical Engineering/Computer Engineering/CS

Master's degree (advantageous)

Herramientas

VCS

Xcelium

Questa

UPF

Git/Perforce

Descripción del empleo

3M HEALTHCARE in Guadalajara seeks an experienced verification engineer to perform functional verification of an integrated SoC and develop scalable verification environments. You will execute plans, run emulation models, and collaborate with RTL, architecture, and design teams to ensure coverage and security are embedded in pre-silicon workflows.

Requirements include a 5+ year background in hardware verification with Verilog/VHDL, UVM/SystemVerilog, and strong English proficiency; applicants