Senior HF Verification Architect - Broadband Optical ICs

Ams Italy S.R.L.

Seggiano

In loco

EUR 90.000 - 150.000

Tempo pieno

4 giorni fa
Candidati tra i primi
Generatore di candidature

Una candidatura mirata per questo annuncio — un curriculum e una lettera di presentazione pensati per rispondere alle esigenze dell'annuncio.

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Descrizione del lavoro

Ams Italy S.R.L. is seeking a Verification Leader to define verification strategies for broadband optical ICs, including high-frequency mixed-signal interfaces and high-speed datapaths.

You will lead verification plans and drive coverage closure, applying system-level use cases to ensure robust designs. The ideal candidate has a MSc or PhD in Electrical Engineering, 10+ years of verification experience, and deep expertise in SystemVerilog, UVM, and automated regression environments on advanced

Competenze

  • MSc or PhD in Electrical Engineering or equivalent.
  • 10+ years verification experience in complex ICs.
  • Strong expertise in SystemVerilog and UVM.
  • Broadband optical IC verification including mixed-signal interfaces and high-speed datapaths.
  • Experience with automated regression environments and advanced CMOS nodes.

Mansioni

  • Verification leader responsible for defining verification strategies for broadband optical communication ICs.
  • Define verification methodologies and plans for block and chip level.
  • Lead block and chip-level verification activities and governance.
  • Drive coverage closure and quality metrics across projects.

Formazione

MSc or PhD in Electrical Engineering

Strumenti

SystemVerilog
UVM
Automated regression environments
Mixed-signal verification
CMOS FinFET/FD-SOI

Descrizione del lavoro

Ams Italy S.R.L. is seeking a Verification Leader to define verification strategies for broadband optical ICs, including high-frequency mixed-signal interfaces and high-speed datapaths.

You will lead verification plans and drive coverage closure, applying system-level use cases to ensure robust designs. The ideal candidate has a MSc or PhD in Electrical Engineering, 10+ years of verification experience, and deep expertise in SystemVerilog, UVM, and automated regression environments on advanced

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