Lead Verification Architect for High-Speed Optical ICs

ams Italy S.r.l.; Monza; In loco; EUR 90.000 - 150.000; Tempo pieno

Descrizione del lavoro

ams OSRAM in Italy seeks a Verification Leader to define strategies for broadband optical ICs, including high-frequency mixed-signal interfaces and high-speed datapaths. You will drive verification plans, lead block- and chip-level verification, and mentor engineers in a fast-paced R&D environment.

The ideal candidate has MSc or PhD in Electrical Engineering with 10+ years in verification, SystemVerilog/UVM, and experience with FinFET/FD-SOI processes, coverage-driven verification and automated

Competenze

• MSc or PhD in Electrical Engineering
• 10+ years verification experience
• Broadband optical communication IC verification, including mixed-signal interfaces, high-speed datapaths and system-level use cases
• Coverage-driven verification
• Automated regression environments
• Advanced CMOS node experience, including FinFET and/or FD-SOI

Mansioni

• Verification leader responsible for defining verification strategies for broadband optical communication ICs, including high-frequency mixed-signal interfaces and high-speed digital datapaths
• Define verification methodologies and plans
• Lead block and chip-level verification
• Drive coverage closure and quality metrics
• Coordinate cross-functional debug activities
• Mentor verification engineers

Conoscenze

SystemVerilog

UVM

Verification leadership

Mixed-signal verification

Coverage-driven

Automated regression environments

Formazione

MSc in Electrical Engineering

PhD in Electrical Engineering

Descrizione del lavoro

ams OSRAM in Italy seeks a Verification Leader to define strategies for broadband optical ICs, including high-frequency mixed-signal interfaces and high-speed datapaths. You will drive verification plans, lead block- and chip-level verification, and mentor engineers in a fast-paced R&D environment.

The ideal candidate has MSc or PhD in Electrical Engineering with 10+ years in verification, SystemVerilog/UVM, and experience with FinFET/FD-SOI processes, coverage-driven verification and automated