Principal Digital P&R Engineer - High-Speed ICs

Ams Osram; Bardi; In loco; EUR 120.000 - 180.000; Tempo pieno

Descrizione del lavoro

ams OSRAM is seeking a Principal Hs Digital Place & Route Engineer to lead high-speed digital backend development from synthesis through tape-out. The role requires a Master/PhD in Electrical Engineering or Microelectronics and 10+ years in digital physical implementation, with strong Cadence EDA experience.

You will drive timing closure, PPA, and advanced node enablement while mentoring engineers and coordinating with foundries, vendors, and internal teams across multiple projects.

Competenze

• MSc or PhD in Electrical Engineering, Microelectronics, or related field.
• 10+ years of experience in digital physical implementation and backend design.
• Proven expertise with industry-standard physical design tools and flows (Cadence EDA flow preferred).
• Strong knowledge of floorplanning, placement, CTS, routing, STA, physical verification, power integrity, and signal integrity analysis.
• Extensive experience with timing closure and sign-off methodologies.
• Experience with high-speed interfaces such as UCIe, PCIe, DDR, SerDes, USB, MIPI, or similar protocols is highly desirable.
• Experience driving methodology development and engineering best practices across multiple projects.
• Strong communication, collaboration, mentoring, and technical leadership skills.
• Ability to work independently and influence technical decisions at organizational level.

Mansioni

• Lead place-and-route from synthesis results through PnR to sign-off and tape-out.
• Define, deploy, and maintain digital backend methodologies, flows, and best practices.
• Drive timing closure, power, performance, area, signal integrity, EM/IR and physical verification strategies.
• Mentor and develop engineers within the digital backend community.
• Lead EDA tool evaluations, methodology improvements, and flow automation initiatives.
• Interface with foundries, EDA vendors, and methodology teams.
• Support technology enablement for advanced CMOS nodes including FinFET and FD-SOI.
• Drive continuous improvement of backend design efficiency and quality.

Conoscenze

Digital backend

Timing closure

Power integrity

Signal integrity

Mentoring

Leadership

Formazione

MSc/PhD in Electrical Engineering or Microelectronics

Strumenti

Cadence EDA flow

Descrizione del lavoro

ams OSRAM is seeking a Principal Hs Digital Place & Route Engineer to lead high-speed digital backend development from synthesis through tape-out. The role requires a Master/PhD in Electrical Engineering or Microelectronics and 10+ years in digital physical implementation, with strong Cadence EDA experience.

You will drive timing closure, PPA, and advanced node enablement while mentoring engineers and coordinating with foundries, vendors, and internal teams across multiple projects.