Junior Physical Design Engineer - MCU

NXP Semiconductors; Catania; In loco; EUR 31.000 - 43.000; Tempo pieno

Vantaggi offerti da questo lavoro

Annual incentive opportunities

Equity or stock options

Benefits package

Descrizione del lavoro

NXP Semiconductors in Catania invites applications for a Junior Physical Design Engineer. You will learn and execute the RTL-to-GDSII physical implementation flow for complex SoC/MCU designs on advanced nodes, working closely with experienced engineers to meet performance, power, and area targets.

You will also support floorplanning, P&R, CTS, and verification, and collaborate with RTL, DFT, and Analog teams while developing automation scripts to boost flow efficiency.

Competenze

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or related field.
• Solid understanding of digital design principles and IC fundamentals.
• Familiarity with RTL-to-GDSII flow and basic timing concepts.

Mansioni

• Support SOC-level floorplanning, power grid design, IO placement, Place & Route, CTS and physical verification (DRC/LVS/ERC/Antenna).
• Assist with tool setup, STA, timing constraints, IR-drop, EM analysis.
• Collaborate with RTL/DFT/Analog teams for smooth hand-offs and integration.
• Maintain and extend automation scripts (TCL, Python, Perl) to improve flow efficiency.

Conoscenze

Digital design

Scripting with TCL/Python/Perl

English communication

Formazione

Electrical Engineering degree (Bachelors/Masters)

Strumenti

Synopsys Fusion Compiler

Synopsys ICC2

Synopsys Formality

Cadence Innovus

Cadence Genus

Descrizione del lavoro

NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact micro-controllers (MCU) as part of NXP’s intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. As a Junior Physical Design Engineer, you will learn, execute and support the RTL-to-GDSII physical implementation flow for complex SoC/MCU designs on advanced nodes. Working closely with experienced engineers, you will play an active role in meeting performance, power, and area targets.

Your Responsibilities.

• Support SOC-level floorplanning, power grid design, IO placement, Place & Route (P&R), Clock-Tree Synthesis (CTS) and physical verification (DRC, LVS, ERC, Antenna).
• Assist with tool setup, static timing analysis (STA), basic timing constraints management, IR-drop, and Electromigration (EM) analysis.
• Collaborate with RTL, DFT, and Analog design teams to facilitate smooth design hand-offs and integration.
• Maintain and extend automation scripts (TCL, Python, Perl) to improve flow efficiency and design analysis.
• Learn and apply state-of-the-art EDA tools and work with vendors to troubleshoot issues.

Your Profile.

Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or related field. Solid understanding of digital design principles, semiconductor physics, and integrated circuit fundamentals. Familiarity with the basic IC design flow (from RTL concepts to GDSII layout). Understanding of basic timing analysis (setup/hold time), clock distribution, and low-power fundamentals (e.g., clock gating). Basic knowledge of scripting languages such as TCL, Python, and/or Perl. Excellent verbal and written communication skills in English. Fast learner with strong curiosity and passion for microelectronics and hardware development. Analytical mindset, structured, fact-based approach to problem-solving with attention to detail. Strong collaborative spirit with good communication skills for international teamwork.

Desirable skills/experience:

• Prior internship, university thesis, or hands-on projects involving Physical Design / Implementation or VLSI design.
• Familiarity with industry-standard EDA platforms: Synopsys (Fusion Compiler, ICC2, Formality) or Cadence (Innovus, Genus).
• Exposure to IR-drop analysis tools (e.g., Ansys RedHawk, Cadence Voltus).
• Basic knowledge of UPF/CPF low-power techniques or full-custom layout fundamentals.
• Exposure to AI/ML applications in EDA or microcontrollers.

NXP is committed to equal pay for equal work and work of equal value and applies fair, consistent and transparent remuneration practices. As of the date of this posting, the estimated gross annual base salary range for this position in Italy is between 31,200 € and 43,000 € annually. This range is intended as a guideline. Actual compensation may vary based on qualifications, experience, skills, and specific business or organizational needs.

This position falls under the applicable National Collective Labour Agreement (Metalmeccanica Industria). Where relevant, the total compensation package may also include additional elements such as annual incentive opportunities and/or equity, along with a competitive benefits package.

More information about NXP in Italy...

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NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP.

We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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