AMS Verification Engineer - Equity & Flexible Work

INVENTVM Semiconductor; Pavia; In loco; EUR 50.000 - 70.000; Tempo pieno

Descrizione del lavoro

INVENTVM Semiconductor is seeking an experienced AMS Verification Engineer to join our design team in Italy. You will verify mixed-signal ICs by developing robust verification environments, creating testbenches, and ensuring first-pass silicon success.

You will collaborate with analog and digital designers throughout the product development cycle, develop models using Verilog-A/Verilog-AMS, and drive simulations including Monte Carlo and regression tests to validate functionality.

Competenze

• Master's degree in Electrical Engineering, Electronics Engineering or related field.
• Solid understanding of analog and mixed-signal circuit fundamentals.
• Experience with AMS simulation and verification tools (Cadence Virtuoso, Spectre, Xcelium).
• Knowledge of Verilog-AMS, Verilog-A, SystemVerilog, or RNM.
• Familiarity with scripting languages such as Python, Tcl, Perl, or Shell.
• Strong debugging and problem-solving skills.
• Good communication and teamwork abilities.

Mansioni

• Develop and execute verification plans for analog and mixed-signal IPs and SoCs.
• Create, maintain, and enhance AMS verification environments using industry-standard methodologies.
• Develop behavioral models of analog blocks using Verilog-A, Verilog-AMS, SystemVerilog RNM, or equivalent modeling languages.
• Design testbenches, stimuli, checkers, assertions, and coverage metrics to validate mixed-signal functionality.
• Perform functional, corner, Monte Carlo, and regression simulations.
• Collaborate with analog and digital design teams to identify, debug, and resolve functional issues.
• Support integration and verification of analog IPs within larger digital or mixed-signal SoCs.
• Analyze simulation results and communicate findings through clear technical reports.
• Contribute to verification methodology improvements, automation, and scripting.
• Support silicon bring-up and correlation between simulation and laboratory measurements when required.

Conoscenze

Verilog-AMS

Verilog-A

SystemVerilog

RNM (Real Number Modeling)

Python

Tcl

Perl

Shell

Formazione

Master's degree in Electrical Engineering

Strumenti

Cadence Virtuoso

Spectre

Xcelium

Descrizione del lavoro

INVENTVM Semiconductor is seeking an experienced AMS Verification Engineer to join our design team in Italy. You will verify mixed-signal ICs by developing robust verification environments, creating testbenches, and ensuring first-pass silicon success.

You will collaborate with analog and digital designers throughout the product development cycle, develop models using Verilog-A/Verilog-AMS, and drive simulations including Monte Carlo and regression tests to validate functionality.