Analog Mixed-Signal Verification Engineer

Inventvm Semiconductor; Lodi; In loco; EUR 60.000 - 80.000; Tempo pieno

Vantaggi offerti da questo lavoro

Equity stake

Competitive benefits

Sustainable work logistics

Descrizione del lavoro

INVENTVM cerca un AMS Verification Engineer per unirsi al team di progettazione. Rivaluterai circuiti misti analogici/digitali, sviluppando ambienti di verifica robusti, testbench e modelli comportamentali per garantire la prima messa in silicon.

Collaborerai strettamente con designer analogici e digitali lungo l'intero ciclo di sviluppo. Hai esperienza con verifica AMS, strumenti come Cadence Virtuoso, Spectre o Xcelium e conoscenza di Verilog-AMS/Verilog-A/SystemVerilog RNM.

Competenze

• Laurea magistrale in Ingegneria Elettronica o affine.
• Forte conoscenza di verifica analogica/minata-analogica.
• Conoscenza di Verilog-A/Verilog-AMS SystemVerilog RNM.

Mansioni

• Progettare ed eseguire piani di verifica per IP e SoC analogici e mixed-signal.
• Sviluppare ambienti di verifica AMS e testbench.
• Modellare blocchi analogici con Verilog-A/Verilog-AMS/SystemVerilog RNM.
• Creare testbench, stimoli, checker, asserzioni e metriche di coverage.
• Eseguire simulazioni funzionali, corner, Monte Carlo e regressione.
• Collaborare con team di progettazione analogica e digitale.
• Supportare l'integrazione e la verifica di IP analogici in SoC.
• Analizzare risultati di simulazione e redigere rapporti tecnici.
• Contribuire a metodologie di verifica, automazione e scripting.
• Supportare il bring-up del silicon e il confronto con misure di laboratorio.

Descrizione del lavoro

Descrizione dell’offerta di lavoro

INVENTVM is actively looking for a talented AMS Verification Engineer to join the design team.

In this role, you will be responsible for verifying mixed-signal and analog/mixed-signal (AMS) integrated circuits by developing robust verification environments, creating testbenches, and ensuring first-pass silicon success. You will work closely with analog and digital designers throughout the product development cycle.

Key Responsibilities

• Develop and execute verification plans for analog and mixed-signal IPs and SoCs
• Create, maintain, and enhance AMS verification environments using industry-standard methodologies
• Develop behavioral models of analog blocks using Verilog-A, Verilog-AMS, SystemVerilog RNM, or equivalent modeling languages
• Design testbenches, stimuli, checkers, assertions, and coverage metrics to validate mixed-signal functionality
• Perform functional, corner, Monte Carlo, and regression simulations
• Collaborate with analog and digital design teams to identify, debug, and resolve functional issues
• Support integration and verification of analog IPs within larger digital or mixed-signal SoCs
• Analyze simulation results and communicate findings through clear technical reports
• Contribute to verification methodology improvements, automation, and scripting
• Support silicon bring-up and correlation between simulation and laboratory measurements when required

Required Qualifications

• Master's degree in Electrical Engineering, Electronics Engineering, or a related field
• Solid understanding of analog and mixed-signal circuit fundamentals, including:
• Operational amplifiers
• Comparators
• ADCs and DACs
• PLLs (preferred)
• Voltage regulators and references
• Switched-capacitor circuits
• Experience with AMS simulation and verification tools (e.g., Cadence Virtuoso, Spectre, Xcelium)
• Knowledge of Verilog-AMS, Verilog-A, SystemVerilog, or Real Number Modeling (RNM)
• Familiarity with scripting languages such as Python, Tcl, Perl, or Shell
• Strong debugging and problem-solving skills
• Good communication skills and ability to work effectively in cross-functional teams

Fluent in English

Desirable Qualifications

• Experience with UVM-based verification environments.
• Knowledge of digital verification methodologies.
• Familiarity with mixed-signal modeling techniques and abstraction levels.
• Experience with low-power verification concepts.
• Understanding of CMOS device operation and semiconductor fundamentals.

All INVENTVM positions offer a stake in the company equity that also entitles to receive dividends, competitive benefits, sustainable work logistics aimed at balancing personal life and project deadlines.