Walk-in | Lead DV Engineer / Technical Lead - Design Verification

Verifast Technologies; Pune District, Ahmedabad District; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

VeriFast Technologies is seeking an experienced Lead - Design Verification Engineer/ Technical Lead - Design Verification to join our engineering team in Ahmedabad or Pune. You will lead ASIC/SoC verification efforts and build robust verification environments for high-speed interfaces.

Ideal candidates have 7+ years hands-on ASIC/SoC verification, strong SystemVerilog and UVM skills, and solid C/C++ programming.

Qualifications

• 7+ years hands-on experience in ASIC/SoC Design Verification
• Strong expertise in SystemVerilog and UVM methodology
• Good programming skills in C/C++
• Solid understanding of digital design fundamentals and ASIC verification flows
• Experience with industry-standard protocols such as PCIe, UCIe, CXL, RISC-V

Responsibilities

• Lead design verification efforts for ASIC/SoC projects
• Build robust verification environments for high‑speed interfaces
• Collaborate with cross‑functional teams to ensure quality and on‑time silicon delivery

Skills

ASIC/SoC verification

SystemVerilog

UVM

C/C++

Digital design fundamentals

Verification flows

Education

Bachelor's or Master's in Electronics/Electrical Eng/CS

Tools

PCIe

UCIe

CXL

RISC-V

AXI/AHB/APB

USB

Commercial simulators

Job description

Role & responsibilities

VeriFast Technologies is looking for experienced Lead - Design Verification Engineer/ Technical Lead - Design Verification to join our growing engineering team in Ahmedabad. If you have a strong background in ASIC/SoC verification and hands-on expertise with high-speed interface protocols, this is an opportunity to work on cutting-edge semiconductor projects alongside industry experts.

We're seeking engineers who thrive on solving complex verification challenges and are passionate about building robust verification environments for next-generation silicon

Location: Ahmedabad, Gujarat OR Pune, Maharashtra

Preferred candidate profile

Required Qualifications

• Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Science, or a related discipline.
• 7+ years of hands-on experience in ASIC/SoC Design Verification.
• Strong expertise in SystemVerilog and UVM methodology.
• Good programming skills in C/C++.
• Strong understanding of digital design fundamentals and ASIC verification flows.
• Hands-on experience with one or more industry-standard protocols such as:
• PCIe (PCI Express)
• UCIe
• CXL
• RISC-V
• Experience working with commercial simulators and debugging complex verification environments.

Preferred Skills

Experience with one or more of the following will be an added advantage:

• AXI
• AHB/APB
• USB
• Functional Coverage
• Constrained Random Verification
• Assertion-Based Verification
• IP and SoC Verification
• Regression Automation and Debugging