Synopsis Memory Compiler Engineer

Sunrise Biztech Systems; Hyderabad; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

Sunrise Biztech Systems Pvt. Ltd. in Hyderabad invites applications for a Memory Compiler Design Engineer on a 9 months contract. The role targets 3nm and below nodes with prior AMD experience preferred.

Responsibilities include understanding SRAMs and memory compilers, Verilog, timing (.lib), LEF and GDS, and performing SPICE simulations. Familiarity with DRC/LVS and scripting in PERL/Python/Unix shell is desirable.

Qualifications

• 3nm and below nodes experience, prior AMD experience preferred.
• Understanding SRAMs and memory compilers; memory design flow.
• Familiarity with Verilog, timing (.lib), LEF, GDS.
• Familiarity with physical design verification (DRC, LVS).
• Able to perform circuit simulations (SPICE).
• Able to script in PERL, Unix shell, Tcl, Python.

Skills

Memory compiler

SRAM concepts

Verilog

SPICE simulations

Perl scripting

Python scripting

Unix shell

Tcl scripting

DRC/LVS

Tools

Synopsys Memory Compiler

DRC/LVS tools

Memory design tools

Job description

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Job Title: Memory Compiler Design Engineer

Location: Hyderabad

Duration: 9 Months Contract

3nm & below nodes exp needed. Prior AMD exp mandatory.

• Understanding of SRAMs and memory compilers (Synopsis Memory Compiler experience preferred) as well as VLSI design flow
• Familiarity with memory design and views of memories, e.g. Verilog, timing (.lib), LEF, GDS
• Familiarity with physical design verification, e.g. DRC and LVS
• Able to perform and interpret circuit simulations, e.g. using SPICE
• Ability to execute and modify scripts in PERL, Unix shell, Tcl, Python or related language.