Hardware Design Engineer 1766

Sunrise Biztech Systems; Hyderabad; On-site; INR 700,000 - 1,000,000; Full time

Job summary

Sunrise Biztech Systems in Hyderabad is seeking a Hardware Design Engineer 1 for a 12-month contract. The role requires 2-6 years of experience and focuses on memory compiler tools, memory views, and verification tasks.

You will interpret documentation, generate and validate memory views, perform basic SPICE simulations, and support DRC/LVS and physical design verification as part of a cross-functional team.

Qualifications

• Understand documentation and resolve end-user queries related to Synopsys Memory Compilers.
• Generate and validate compiled memory views for released versions.
• Perform quality checks/QA on memory views.
• Track project activities, action items, and deliverables against timelines.
• Work with memory views such as Verilog, .lib, LEF, and GDS.
• Perform and interpret basic SPICE/circuit simulations.
• Support DRC/LVS and physical design verification.

Responsibilities

• Understand documentation and resolve end-user queries related to Synopsys Memory Compilers.
• Generate and validate compiled memory views for released versions.
• Perform quality checks/QA on memory views.
• Track project activities, action items, and deliverables against timelines.
• Work with memory views such as Verilog, .lib, LEF, and GDS.
• Perform and interpret basic SPICE/circuit simulations.
• Support DRC/LVS and physical design verification.

Skills

Memory design basics

Documentation interpretation

Tools

Synopsys Memory Compilers

Verilog

.lib

LEF

GDS

SPICE simulations

Job description

Position:Hardware Design Engineer 1

Experience:2-6 Years

Location: Hyderabad

Contract :12 Months

Role & responsibilities:

• Understand documentation and resolve end-user queries related to Synopsys Memory Compilers.
• Generate and validate compiled memory views for released versions.
• Perform quality checks/QA on memory views.
• Track project activities, action items, and deliverables against timelines.
• Work with different memory views such as Verilog, .lib, LEF, and GDS.
• Perform and interpret basic SPICE/circuit simulations.
• Support DRC/LVS and physical design verification activities.