Staff Engineer, IP Dev Layout

Micron Technology, Inc

Hyderabad

On-site

INR 2,500,000 - 4,500,000

Full time

5 days ago
Be an early applicant

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Medical, dental and vision plans
Robust paid time-off program
Paid holidays
Paid family leave

Job summary

Micron Technology, Inc in Hyderabad seeks a Semiconductor Design Engineer 4 to lead analog/mixed-signal layout and full-chip integration, driving schedules and quality across multiple projects.

The role requires Cadence VLE/VXL and Calibre DRC/LVS proficiency, strong problem-solving, and proactive use of AI tools to optimize layout verification and collaboration with global teams.

Qualifications

  • Experience in analog/custom layout in advanced CMOS processes (Planar, FinFET).
  • Strong knowledge of layout fundamentals and timing/power/area trade-offs.
  • Hands-on experience with critical blocks: Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator.
  • Excellent verbal and written communication skills; proactive in AI-related tools.
  • Able to understand build constraints and layout hierarchical design for memory.

Responsibilities

  • Responsible for design and development of analog, mixed-signal, and custom digital blocks and full-chip integration support.
  • Perform layout verification (LVS/DRC/Antenna) and quality checks; support documentation.
  • Ensure on-time delivery of block-level layouts with acceptable quality.
  • Demonstrate leadership in planning, estimation, scheduling, and execution across multiple projects.
  • Contribute to effective project-management and coordinate with global engineering teams.

Skills

Leadership
Communication
Problem-solving
AI tools awareness
Project-management

Education

BE or MTech in Electronic/VLSI Engineering

Tools

Cadence VLE/VXL
Mentor Calibre DRC/LVS

Job description

Role and Responsibilities
  • Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.
  • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation.
  • Responsible for on-time delivery of block-level layouts with acceptable quality.
  • Demonstrate leadership skills in planning, area/time estimation, scheduling, and execution to meet project scheduling multiple project environment.
  • Contribute to effective project-management.
  • Effectively communicating with Global engineering teams to assure the success of layout project.
Qualification/Requirements
  • 8 to 15 years' experience in analog/custom layout build in advanced CMOS process, in various technology nodes (Planar, FinFET )
  • Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
  • Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc,
  • Good understanding of Analog Layout fundamentals (e.cg., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive static device parasitics etc.)
  • Understanding layout effects on the circuit such as speed, capacitance, power and area etc.
  • Ability to understand build constraints and implement high-quality layouts
  • Ability to understand build hierarchy and different architectures for Memory designs.
  • Excellent problem-solving skills in physical verification of custom layout.
  • Multiple Tape out support experience will be an added advantage.
  • Excellent verbal and written communication skills
  • Should be proactive in exploring and using AI-related tools in day-to-day tasks.
  • All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
Education
  • BE or MTech in Electronic/VLSI Engineering

Job Profile(s): Semiconductor Design Engineer 4

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.

  • We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
  • Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
  • Micron benefits include a robust paid time-off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Staff Engineer, IP Dev Layout Hyderabad, Telangana, India Posted 10 hours ago
Staff Engineer, IP Dev Layout Hyderabad, Telangana, India Posted 10 hours ago

Micron Technology, Inc • Hyderabad

On-site
INR 1,800,000 - 3,200,000
Senior Engineer- DEG Layout
Senior Engineer- DEG Layout

Micron Technology, Inc • Bengaluru

On-site
INR 1,200,000 - 1,800,000
Medical, dental and vision plans
Paid family leave
Robust paid time-off program
Layout Engineer, DPG IP DEV Layout Bengaluru, Karnataka, India
Layout Engineer, DPG IP DEV Layout Bengaluru, Karnataka, India

Micron Technology, Inc • Bengaluru

On-site
INR 1,000,000 - 1,400,000
STAFF Engineer -DEG Layout
STAFF Engineer -DEG Layout

Micron Technology, Inc • Bengaluru

On-site
INR 1,500,000 - 2,500,000
Medical, dental and vision plans
Paid family leave
Robust paid time-off program
Layout Engineer, DPG IP DEV Layout
Layout Engineer, DPG IP DEV Layout

Micron Technology, Inc • Bengaluru

On-site
INR 1,200,000 - 2,200,000
Medical, dental and vision plans
Paid time off & holidays
Staff layout Engineer – DPG Layout Hyderabad, Telangana, India Posted a day ago
Staff layout Engineer – DPG Layout Hyderabad, Telangana, India Posted a day ago

Micron Technology, Inc • Hyderabad

On-site
INR 3,500,000 - 5,500,000
Medical plans
Dental plans
Paid time off
Senior Layout Designer
Senior Layout Designer

Micron Technology, Inc • Hyderabad

On-site
INR 1,200,000 - 2,000,000
Medical plans
Paid time off
SENIOR ENG-HIG-HBM-LAYOUT
SENIOR ENG-HIG-HBM-LAYOUT

Micron Technology, Inc • Hyderabad

On-site
INR 3,000,000 - 4,200,000
STAFF Engineer -DEG Layout
STAFF Engineer -DEG Layout

1840 Micron Tech. OP India LLP • Bengaluru

On-site
INR 1,500,000 - 2,500,000
Staff Layout Engineer – DPG Layout
Staff Layout Engineer – DPG Layout

Micron Technology • Hyderabad

On-site
INR 1,500,000 - 2,000,000