PDN / EMIR Engineer

SmartSoC Solutions Pvt Ltd

Bengaluru

On-site

INR 1,500,000 - 2,100,000

Full time

27 hours ago
Be an early applicant
Application generator

Don’t send a generic resume — generate a resume and cover letter tailored to this exact role.

Get past ATS filters

Job summary

SmartSoC Solutions Pvt Ltd in Bengaluru is seeking EMIR / Power Integrity Engineers with strong hands-on experience in EM/IR analysis, RedHawk-SC, and Power Grid design.

The role involves analyzing EMIR issues, driving convergence, and collaborating with Physical Design teams to achieve full-chip signoff.

Qualifications

  • 3–12 years of experience in EMIR / Power Integrity / ASIC signoff
  • Hands-on EMIR analysis and convergence
  • RedHawk-SC experience mandatory
  • Strong understanding of IR drop, electromigration, and power integrity
  • Experience with PG Grid specification, analysis and validation
  • EMIR debugging and signoff closure
  • Ability to provide ECO guidance to PnR teams
  • Good understanding of ASIC Physical Design and signoff flows

Responsibilities

  • Perform EM/IR analysis and signoff for complex SoC/ASIC designs using RedHawk-SC.
  • Analyze Static/Dynamic IR Drop, Electromigration, and current-density violations.
  • Perform root-cause analysis of EMIR violations and identify appropriate corrective actions.
  • Validate PnR databases, PG connectivity, power structures, and EMIR inputs.
  • Drive EMIR convergence in collaboration with Physical Design teams.
  • Provide ECO recommendations for PG strengthening, via optimization, placement/routing changes, and other design fixes.
  • Define, review, and validate Power Grid specifications based on design power and reliability requirements.
  • Correlate EMIR issues with placement, routing, power, and timing to identify root causes.
  • Support block and full-chip EMIR signoff closure.
  • Work closely with Physical Design, STA, Power, and Physical Verification teams throughout signoff.

Skills

EMIR analysis
Convergence
RedHawk-SC
IR Drop
Electromigration
Current density
PG Grid specification
EMIR debugging
ECO guidance to PnR
ASIC physical design
Signoff flows

Tools

RedHawk-SC

Job description

SmartSOC is looking for EMIR / Power Integrity Engineers with strong hands-on experience in EM/IR analysis, RedHawk-SC, and Power Grid (PG) design/specification. The role involves analyzing EMIR issues, driving convergence, and working closely with Physical Design teams to achieve full-chip/block-level signoff.

Key Responsibilities

  • Perform EM/IR analysis and signoff for complex SoC/ASIC designs using RedHawk-SC.
  • Analyze Static/Dynamic IR Drop, Electromigration, and current-density violations.
  • Perform root-cause analysis of EMIR violations and identify appropriate corrective actions.
  • Validate PnR databases, PG connectivity, power structures, and EMIR inputs.
  • Drive EMIR convergence in collaboration with Physical Design teams.
  • Provide ECO recommendations for PG strengthening, via optimization, placement/routing changes, and other design fixes.
  • Define, review, and validate Power Grid (PG) specifications based on design power and reliability requirements.
  • Correlate EMIR issues with placement, routing, power, and timing to identify root causes.
  • Support block and full-chip EMIR signoff closure.
  • Work closely with Physical Design, STA, Power, and Physical Verification teams throughout signoff.

Must-Have Skills

  • 3–12 years of relevant experience in EMIR / Power Integrity / ASIC signoff.
  • Strong hands-on experience in EMIR analysis and convergence.
  • RedHawk-SC experience is mandatory.
  • Strong understanding of IR Drop, Electromigration, current density, and power integrity.
  • Experience in PG Grid specification, analysis, and validation.
  • Hands-on experience with EMIR debugging and signoff closure.
  • Ability to provide effective ECO guidance to PnR teams.
  • Good understanding of ASIC Physical Design and signoff flows.

Good to Have

  • Basic understanding of STA concepts.
  • Exposure to DRC/LVS and Physical Verification.
  • Experience with Multi-Voltage / Multi-Power-Domain designs.
  • Knowledge of UPF/CPF.
  • Scripting experience in Tcl / Python / Perl / Shell.
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior Engineer
Senior Engineer

SmartSoC Solutions Pvt Ltd • Bengaluru

On-site
INR 1,200,000 - 2,700,000
Senior EMIR Engineer
Senior EMIR Engineer

SmartSoC Solutions Pvt Ltd • Bengaluru

On-site
INR 1,500,000 - 2,600,000
Physical Design Engineer
Physical Design Engineer

AMD • Bengaluru Urban

On-site
INR 1,500,000 - 2,300,000
Senior Staff Engineer - Power Integrity
Senior Staff Engineer - Power Integrity

MediaTek Research Lab Inc. • Bengaluru

On-site
INR 3,000,000 - 6,000,000
EMIR Engineer
EMIR Engineer

LeadSoc Technologies Pvt Ltd • Bengaluru

On-site
INR 1,200,000 - 2,000,000
Sr. Staff Engineer, EMIR/Power Integrity
Sr. Staff Engineer, EMIR/Power Integrity

Ayar Labs • Bengaluru

On-site
INR 7,000,000 - 10,000,000
Design Methodology – Principal DRAM Power Integrity Engineer
Design Methodology – Principal DRAM Power Integrity Engineer

1840 Micron Tech. OP India LLP • Hyderabad

On-site
INR 1,200,000 - 1,800,000
Senior Physical Design Engineer
Senior Physical Design Engineer

LeadSOC Technologies Pvt Ltd • Bengaluru

On-site
INR 4,500,000 - 7,500,000
Full-Time (Job ID: ASIC EMIR / Physical Design Engineer)
Full-Time (Job ID: ASIC EMIR / Physical Design Engineer)

Truechip Solutions • Bengaluru

On-site
INR 1,400,000 - 2,400,000
Design Methodology – Senior / Staff DRAM Power Integrity Engineer
Design Methodology – Senior / Staff DRAM Power Integrity Engineer

Micron Technology, Inc • Hyderabad

On-site
INR 1,200,000 - 1,800,000