Silicon Physical Design Engineer III

Mackin Talent; Bangalore Rural; On-site; INR 1,200,000 - 1,500,000; Full time

Benefits offered by this job

Major medical carrier

15 days of PTO plus Holiday and Sick pay

Paid volunteer hours

Paternity/maternity leave

Job summary

A leading technology firm based in Bangalore is seeking a skilled Physical Design Engineer with at least 5 years of experience in low-power design. The candidate will be responsible for physical design implementation, resolving design issues, and conducting power analysis. Proficiency in EDA tools and programming skills in Python, TCL, and Perl are essential. The company offers a competitive benefits package including medical coverage, paid time off, and a supportive team-oriented environment.

Qualifications

• 5 years of relevant physical design experience.
• Experience in running physical-aware logic synthesis and achieving optimal synthesis QoR.
• Knowledge of static timing analysis and concepts.
• Experience in chip power analysis.

Responsibilities

• Develop and own physical design implementation of low-power designs.
• Resolve design and flow issues related to physical design.
• Power analysis based on netlist.

Skills

RTL2GDSII flow understanding

Low power implementation

EDA tools (DC/Genus, ICC2/Innovus)

Power analysis

Python programming

TCL programming

Perl programming

Job description

Top non‑negotiable skill sets required for this role:

• Strong understanding in the RTL2GDSII flow and design tapeouts in 16nm/14nm or below process technologies
• Experience with low power implementation, power gating, multiple voltage rails, strong UPF/CPF knowledge.
• Experience working with most EDA tools like DC/Genus, ICC2/Innovus, Primetime, PTPX, Primepower

Duties

• Develop and own physical design implementation of multi‑hierarchy low‑power designs including physical‑aware logic synthesis, design for testability, floorplan, place and route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes.
• Resolve design and flow issues related to physical design, identify potential solutions, and drive execution.
• Power analysis based on netlist.

Requirements

Must Have:

• 5 years of relevant physical design experience
• Experience in running physical‑aware logic synthesis and achieving optimal synthesis QoR on low‑power designs
• Knowledge of static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.
• Experience in chip power analysis
• Experience with custom or regular clock tree synthesis implementation at block level or top level, and clock power reduction techniques.
• Experience with Python, TCL, Perl programming

Mackin Talent offers an attractive benefits package which includes major medical carrier, 15 days of PTO plus Holiday and Sick pay, paid volunteer hours, paternity/maternity leave and many more. We pride ourselves on our company values, the top one being that Relationships Matter. Come experience the Mackin Difference and our welcoming company culture with a focus on teamwork and family. Learn more about Mackin and apply online at MackinTalent.com.