Senior Verification Director

Mulya Technologies; Bengaluru; On-site; INR 2,500,000 - 3,500,000; Full time

Job summary

A prominent AI hardware startup in Bengaluru is seeking a Senior Director of Digital Hardware Verification to lead their SoC design verification organization. The ideal candidate will have 20-25 years of experience in SoC/ASIC development and more than 8 years in a leadership role. You will manage a high-performing team, drive design verification practices, and collaborate with architecture, RTL design, and firmware teams. This full-time position offers an opportunity to shape next-generation AI compute platforms.

Qualifications

• 20–25 years of experience in SoC/ASIC development with at least 8 years in leadership.
• Proven expertise in front-end design verification.
• Experience leading geographically distributed teams.

Responsibilities

• Lead and mentor a high-performing team of SoC design verification engineers.
• Own IP, subsystem, and full-chip design verification from spec through tape-out.
• Drive project planning and task allocation for verification teams.

Skills

UVM or other verification frameworks

SoC and full chip verification

Low power design techniques

Exceptional communication and leadership

Education

Bachelor’s or Master’s in Electrical Engineering or Computer Engineering

Job description

Founder @ Mulya - Ranked as the most admirable partner for Intel -India (in 2021)

We are a well-funded US AI hardware startup building next-generation compute platforms that bring advanced, secure, and sustainable AI from the edge to the cloud. Backed by groundbreaking R&D in computation physics, ultra-efficient circuits, and scalable architectures, we are redefining what’s possible in performance and energy efficiency. Join a team of industry veterans pushing the boundaries of AI and shaping technology that will serve humanity at global scale.

Job Description

We are seeking a Senior Director of Digital Hardware Verification to lead and expand our SoC design verification organization in Bangalore. This is a hands‑on technical leadership role responsible for scaling a world‑class design verification team, driving verification across multiple SoC programs, and collaborating closely with architecture, RTL design, physical design, firmware, and software teams. You will play a pivotal role in driving verification for ultra‑efficient, next‑generation AI compute platforms.

Responsibilities

• Lead and mentor a high‑performing team of SoC design verification engineers across IP verification, SoC/subsystem verification and platform verification.
• Own IP, subsystem, and full‑chip design verification from spec through tape‑out.
• Partner closely with Architecture, RTL design, PD, Firmware, and Post‑Si teams to realize high‑quality silicon on aggressive schedules.
• Drive project planning, resourcing, task allocation, and execution tracking for verification teams across multiple concurrent programs.
• Recruit, develop, and retain top‑tier engineering talent.
• Establish and enforce best practices for design verification to achieve high quality designs
• Develop design verification architecture, test plans and other verification documents. Plan for coverage and other quality metrics.
• Guide and oversee test bench components, checker, monitor, scoreboard development, low‑power verification, equivalence checking, hardware prototyping and other verification technique.
• Participate in design, micro‑architecture, DV, and PD reviews to ensure there are no gaps in design verification.
• Coordinate seamlessly with global teams across geographies to ensure verification convergence and alignment.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 20–25 years of experience in SoC/ASIC development with at least 8+ years in technical leadership or engineering management.
• Proven expertise in front‑end design verification using UVM or other such verification frameworks.
• Deep expertise in coverage driven verification, equivalence checking, hardware prototyping for verification, and other state‑of‑the‑art verification methodologies.
• Broad experience with SoC and full chip verification, clock/power/reset verification, low power verification system bring‑up and firmware verification.
• Experience with UCIe or similar chiplet protocols, PCIe and/or CXL.
• Good understanding of interconnect protocols (AXI/CHI), memory systems (DDR, HBM), and caching/coherency architectures.
• Experience with ML/AI accelerators, GPUs, CPUs (RISC‑V or ARM), and advanced low‑power design techniques.
• Some experience in front‑end micro‑architecture and RTL design is a big plus.
• Exceptional communication, leadership, and cross‑functional collaboration skills.
• Experience leading and collaborating with geographically distributed teams.

Contact

"Mining The Knowledge Community"

Seniority level

• Director

Employment type

• Full‑time

Job function

• Design, Engineering, and Management

Industries

• Semiconductor Manufacturing, Computer Hardware Manufacturing, and Computer and Network Security