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NEWSOFT CONSULTANTS in Bengaluru is seeking an experienced RTL/DFT engineer to design and validate DFT micro-architecture for SCAN, MBIST, and JTAG. You will run RTL & GLS for DFT modes and optimize test insertion flows.
The role requires deep HDL skills (Verilog), expertise with Tetramax or Tessent, and familiarity with VCS and Verdi for hardware verification and debugging.
Block-level/sub-sys DFT micro-arch: SCAN, MBIST, IP tests, JTAG. Test insertion flow for scan, MBIST, JTAG. Achieve targeted test coverage. Run RTL & GLS for DFT modes.
Debug timing constraints.
Test patterns pre-silicon/post-silicon. TCL/Perl.