Senior RTL Design Lead

HCLTech; Bengaluru; On-site; INR 1,800,000 - 3,200,000; Full time

Benefits offered by this job

Health insurance

Job summary

HCL Technologies Limited is seeking a Senior RTL Verification Lead in Bengaluru to drive SoC pre-silicon verification and emulation initiatives. The role requires deep expertise in SystemVerilog/UVM, digital design verification, and automation using Python.

You will mentor teams, develop verification environments, and ensure robust test coverage for critical infrastructure features. The candidate will collaborate with architecture, design, and firmware teams to resolve complex issues and ensure

Qualifications

• Experience in SoC Pre-Silicon Verification and Emulation.
• Strong SystemVerilog/UVM expertise with testbench development.
• Proficient in Python for automation and test execution.
• Familiarity with debug tools, waveform analysis, and root-cause analysis.
• Ability to work across architecture, design, and firmware teams.

Responsibilities

• Lead SoC verification and emulation efforts in pre-silicon environments.
• Develop and execute verification plans and regression suites.
• Debug complex SoC issues and drive verification closure.
• Validate platform infrastructure, including Reset, Security, and Power Management.
• Collaborate with cross-functional teams to resolve integration issues.

Job description

Career Opportunities: Senior RTL Design Lead (174512)

Requisition ID174512-Posted11/10/2026

We are seeking experienced SoC Verification and Emulation Engineers to support server platform verification activities. The candidate will be responsible for developing and executing verification plans, debugging complex SoC issues, and driving verification closure in pre-silicon and emulation environments.

The role requires strong expertise in SystemVerilog/UVM-based verification methodologies, Python-based automation, and functional validation of critical infrastructure features including Security, Reset, RAS, Clocking, Power Management, GPIO, Debug and Fuse flows.

Key Responsibilities

• Strong expertise in SoC Pre-Silicon Verification and Emulation using SystemVerilog, UVM, Assertions (SVA), Functional Coverage, and Testbench Development.
• Hands-on experience in developing verification environments, checkers, scoreboards, test cases, and regression execution frameworks.
• Proven experience in verifying Debug Fabrics, including VISA, Trace, Observability, Trigger, and TAP/JTAG-based validation.
• Experience in validating SoC Platform Infrastructure and System Control Flows, including Reset, Security, RAS, Fuse, GPIO, Clocking, and Power Management.
• Strong proficiency in Python scripting and automation for pre-silicon and emulation-based test execution.
• Hands-on experience with SoC emulation platforms, including test execution, debug, regression management, and coverage closure.
• Expertise in verification debug tools, waveform analysis, failure triage, and root-cause analysis of complex SoC issues.
• Ability to analyze and resolve SoC integration and functional validation issues in collaboration with architecture, design, and firmware teams.
• Good understanding of Intel Xeon/Client verification methodologies and validation flows.

Strong analytical, communication, and problem-solving skills with the ability to work effectively in cross-functional global teams

Skill Requirements

Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, Computer Science, or a related field

Other Requirements

• 3 to 12 years of experience in SoC Verification, Pre-Silicon Validation and Emulation.