Senior Technical Architect - SoC, Verilog, UVM, C, C++

HCLTech; Bengaluru; On-site; INR 1,500,000 - 2,100,000; Full time

Job summary

HCL Technologies Limited in Bengaluru seeks a Senior Technical Architect to lead x86 core verification for SoC platforms. You will design, implement, and optimize verification strategies using SystemVerilog and Python, while coordinating with architecture, design, and validation teams.

The role emphasizes automation, regression testing, and robust functional validation across emulation environments to ensure silicon readiness.

Qualifications

• Strong understanding of x86 architecture and processor fundamentals.
• Hands-on experience with x86 core verification tools and methodologies.
• Strong Python programming and automation skills.
• Proficiency in SystemVerilog and verification methodologies.
• Experience with assertions, checkers, and debug tools.
• Hands-on experience in SoC emulation environments.
• Strong debugging and root-cause analysis skills.

Responsibilities

• Execute x86 Core verification within SoC-level emulation environments.
• Develop, enhance, and maintain test suites for x86 core functionality validation.
• Analyze and debug functional failures observed during emulation execution.
• Create and maintain verification tests using SystemVerilog and Python.
• Develop assertions, checkers, and coverage-driven validation frameworks.
• Work closely with core architecture, design, and validation teams.
• Execute automated regression suites and track quality metrics.
• Support verification closure and readiness for silicon validation.

Skills

x86 architecture

Python programming

SystemVerilog

Verification methodologies

Assertions & checkers

Root-cause analysis

SoC emulation

Debugging

Job description

Career Opportunities: Senior Technical Architect - SoC, Verilog, UVM, C, C++ (174502)

Requisition ID174502-Posted11/10/2026

We are seeking highly motivated engineers to execute x86 Core verification on SoC emulation platforms. The role requires expertise in x86 architecture, emulation-based validation, Python automation, and verification methodologies to ensure robust functional validation of server SoC products.

Key Responsibilities

• Execute x86 Core verification within SoC-level emulation environments.
• Develop, enhance, and maintain test suites for x86 core functionality validation.
• Analyze and debug functional failures observed during emulation execution.
• Create and maintain verification tests using SystemVerilog and Python.
• Develop assertions, checkers, and coverage-driven validation frameworks.
• Work closely with core architecture, design, and validation teams.
• Execute automated regression suites and track quality metrics.

Support verification closure and readiness for silicon validation

Skill Requirements

• Strong understanding of x86 architecture and processor fundamentals.
• Hands-on experience with x86 core verification tools and methodologies.
• Strong Python programming and automation skills.
• Proficiency in SystemVerilog and verification methodologies.
• Experience with assertions, checkers, and debug tools.
• Hands-on experience in SoC emulation environments.
• Strong debugging and root-cause analysis skills.

Other Requirements

• Experience with processor microarchitecture verification.
• Familiarity with firmware, BIOS, and platform validation flows.
• Exposure to performance validation and debug environments.