Senior RTL Design Engineer

Synopsys Inc; Bengaluru; On-site; INR 1,500,000 - 2,200,000; Full time

Job summary

Synopsys Inc in Bengaluru is seeking an experienced candidate for an FPGA Development role focused on designing advanced prototyping solutions. The ideal applicant should have 9 to 15 years of expertise in RTL development using Verilog or System Verilog, along with hands-on experience in Xilinx and Altera FPGA platforms.

The position requires strong problem-solving and debugging skills, alongside the ability to mentor junior engineers. If you meet these qualifications, please share your updated CV at [e-mail].

Qualifications

• 9 to 15 years of experience in related field.
• Proficiency in digital design principles.
• Hands-on experience with FPGA platforms.

Responsibilities

• Design and develop advanced FPGA-based prototyping solutions.
• Lead the digital design process utilizing relevant tools.
• Drive project lifecycle including requirements gathering and implementation.
• Maintain complex EDA software for prototyping systems.
• Implement digital debug and verification strategies.
• Create RTL interfaces and oversee full design flow.
• Explore new approaches for addressing challenges.
• Mentor junior engineers to foster growth.

Skills

RTL development using Verilog or System Verilog

Expertise with Xilinx and Altera FPGA platforms

Scripting languages (Tcl, Python, Perl)

Advanced problem-solving and debugging

Digital verification and emulation

Education

BSEE with 9 years or MSEE with 8 years of relevant experience

Tools

Xilinx Vivado

Job description

We are seeking an experienced, highly motivated and high-caliber individual with below expertise. Does this sound like a good role for you?

Qualifications

• Experience: 9yrs to 15yrs
• BSEE with 9 years of relevant experience OR MSEE with 8 years of relevant experience.
• Expertise in RTL development using Verilog or System Verilog, with a strong background in digital design principles.
• Hands-on experience with Xilinx and Altera FPGA platforms, including familiarity with Xilinx Vivado and related tools.
• Proficiency in developing large, complex EDA software and managing the full design flow from concept to lab bring-up.
• Advanced problem-solving and debugging skills, especially in digital verification, emulation, and prototyping environments.
• Experience with scripting languages such as Tcl, Python, Perl, and a solid understanding of system and CPU architecture (DMA, interrupts, etc.).
• Exposure to embedded system development and interface protocols (USB, PCIe, DDR, AXI).

Responsibilities

• Designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.
• Leading the digital design process for Xilinx and Altera FPGAs, utilizing tools such as Xilinx Vivado to optimize workflows.
• Driving all phases of the project lifecycle, including requirements gathering, development, implementation, and test case creation.
• Developing and maintaining complex EDA (Electronic Design Automation) software for high-performance prototyping systems.
• Implementing digital debug, verification, emulation, and prototyping strategies to ensure robust and reliable designs.
• Creating RTL for interfaces such as USB, PCIe, DDR, and AXI, and overseeing full design flow including verification and lab bring-up.
• Exploring and implementing new approaches to address current and future challenges, continuously learning and applying new technologies.
• Mentoring junior engineers, providing guidance and support to foster growth and technical excellence within the team.

Please share your updated CV with [e-mail] or refer those who would like to explore this opportunity.

• Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.