Senior/Lead R&D Engineer (C/C++, Data Structures, Algorithms, EDA)
We are seeking a Senior R&D Engineer to join our world‑class Synthesis team in Noida, which supports a range of EDA products. Does this sound like a good role for you?
- Experience: 4‑15 years
- Strong hands‑on experience in C/C++ based software development.
- Strong background in Design Patterns, Data Structures, Algorithms, and programming concepts.
- Familiarity with multi‑threaded and distributed code development & ASIC design flow and the EDA tools and methodologies used therein.
- Good knowledge of Verilog, SystemVerilog & VHDL HDL.
- Well versed with Software Engineering and development processes.
- Experience of production code development on Unix/Linux platforms.
- Exposure to developer tools such as gdb, Valgrind.
- Experience with source code control tool like Perforce.
Responsibilities
- Candidate will be part of word level Synthesis team (catering to multiple EDA products).
- Design, develop, troubleshoot the core algorithms.
- Will be working with local and global teams.
- Will be working on Synthesis QoR, Performance and logic interference problems.
- It is a pure technical role & drive solutions to complex problem with other team members.
Please share your updated CV with taufiq@synopsys.com or refer those who would like to explore this opportunity.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability.
Seniority level
Mid‑Senior level
Employment type
Full-time
Industries
Semiconductor Manufacturing