Senior RTL Design Engineer

L&T Technology Services; Bengaluru; On-site; INR 2,500,000 - 4,000,000; Full time

Job summary

LLTS is seeking an RTL design engineer with 6+ years of hands-on experience to design and implement RTL for complex high-speed digital systems. You will work on front-end logic design from specification through RTL code signoff, collaborating with IP/SoC teams to ensure signoff readiness.

The ideal candidate demonstrates strong communication, independence, and proficiency with RTL signoff tools such as Lint, CDC, SpyGlass, and equivalence checks.

Qualifications

• Experience/proficiency in RTL design(Verilog/VHDL) architecture implementation using (coding in) hardware description (RTL)
• Should have hands on experience in all the Design aspects, should work independently.
• Experience/proficiency in front-end (logic) design of large complex high-speed digital stems from Specification to RTL code signoff
• Experience on RTL signoff tools, Lint, CDC, FE BE, Equivalence checks, Spyglass and other equivalent tools
• Strong team player & effective in communication

Responsibilities

• Design and implement RTL using Verilog/VHDL for complex SoCs
• Work on front-end logic design from specification to RTL signoff
• Collaborate with IP/SoC teams and ensure signoff readiness
• Utilize RTL signoff tools to validate timing and correctness

Skills

RTL design

Verilog/VHDL

architecture implementation

IP design

SoC design

front-end logic design

RTL signoff experience

communication

independent contributor

Tools

Lint

CDC

Equivalence checks

SpyGlass

Job description

LLTS is looking to hire for RTL design engineers with 6+ years of experience with below skills set ::

RTL Design Engineer with 6+ of Hands on experiences.

• Experience/proficiency in RTL design(Verilog/VHDL) architecture implementation using (coding in) hardware description (RTL) , IP Design, SoC Design and Integration
• Should have hands on experience in all the Design aspects, should work independently.
• Experience/proficiency in front-end (logic) design of large complex high-speed digital stems from Specification to RTL code signoff
• Experience on RTL signoff tools, Lint, CDC, FE BE, Equivalence checks, Spyglass and other equivalent tools
• Strong team player & effective in communication