Senior Principle Engineer - SoC Design Verification

NXP Semiconductors; Maharashtra; On-site; INR 1,200,000 - 2,000,000; Full time

Job summary

A leading semiconductor company in Maharashtra is looking for a Senior Principal DV Engineer to lead verification strategy for complex SoCs. The ideal candidate will have over 15 years of experience in SoC/IP verification, strong knowledge of ARM-based microcontrollers, expertise in SystemVerilog, and a proven track record in managing teams. This position demands technical leadership and collaboration in a dynamic environment. You will define verification methods, develop UVM-based environments, and mentor team members while ensuring compliance with safety and security requirements.

Qualifications

• 15+ years in SoC/IP verification with successful tape-outs of multiple SoCs.
• Strong expertise in ARM-based microcontrollers and SoC-level verification.
• Proficiency in SystemVerilog, UVM, and constrained-random verification.

Responsibilities

• Define and own SoC-level and IP-level verification strategy, methodology, and coverage goals.
• Execute verification plans according to specifications.
• Develop and run UVM-based verification environments for simulations.
• Create test cases and run simulations for design models.
• Be familiar with SoC-level and IP-level verification environments.

Skills

ARM-based microcontrollers

SoC-level verification

SystemVerilog

UVM

constrained-random verification

low-power verification

EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa)

assertions (SVA)

functional coverage

verification of interfaces (SPI, I²C, UART, USB, PCIe, Ethernet, eSPI)

Education

Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering

Job description

Job Title

Senior Principal DV Engineer

Location: Pune, India

Role Overview

We are seeking a highly experienced Design Verification (DV) architect / engineer with more than 15 years of experience to lead verification strategy and execution for complex SoCs. The ideal candidate will have deep knowledge of ARM‑based microcontrollers, low‑power design verification, and experience with multiple interfaces and security IPs. This is a hands‑on role requiring strong technical skills, leadership, team mentoring, strategic planning, and collaboration in a fast‑paced environment.

Key Responsibilities

• Define and own SoC‑level and IP‑level verification strategy, methodology, and coverage goals.
• Hands‑on work:
  • Execute verification plans according to product specifications and verification requirements defined by product architects.
  • Develop, debug, and run UVM‑based verification environments for RTL/netlist simulation.
  • Create test cases, stimulus, and assertions; run simulations, debug test cases on design models (RTL, power‑aware RTL, gate level, FPGA, emulation), run regression, and collect and analyze code/functional coverage.
  • Drive DV closure on diverse IPs and subsystems, ensuring maximum coverage and quality.
  • Be familiar with both SoC‑level and IP‑level verification environments.
  • Guide the team in developing and improving flows for maximum reuse and efficiency.
  • Mentor team members while collaborating with design teams for issue resolution and sign‑off.
  • Ensure compliance with functional safety/security requirements.

Required Qualifications

• Experience: 15+ years in SoC/IP verification with successful tape‑outs of multiple SoCs.
• Technical Skills:
  • Strong expertise in ARM‑based microcontrollers and SoC‑level verification.
  • Proficiency in SystemVerilog, UVM, and constrained‑random verification.
  • Familiarity with EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa).
  • Experience with low‑power verification (UPF).
  • Gate‑level simulations and power‑aware simulations.
  • Strong knowledge of assertions (SVA) and functional coverage.
  • Verification of multiple interfaces: SPI, I²C, UART, USB, PCIe, Ethernet, eSPI.
  • Knowledge of Flash memory and security IPs (crypto engines and subsystems) is a plus.
  • Familiarity with common Analog IPs in microcontroller design (ADC, DAC, PLLs).
• Soft Skills:
  • Comfortable working in a fast‑paced environment.
  • Strong team player with excellent communication skills.
  • Proven ability to lead and inspire teams.
  • Strong project management and organizational skills.
  • Excellent communication and stakeholder management.
• Education: Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering.