Senior Physical Design Engineer

Insemi Technology Services; Hyderabad, Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Insemi Technology Services in Hyderabad, India, is seeking a highly motivated Physical Design Engineer to join our VLSI design team. You will implement and optimize ASIC/SoC physical design flows from netlist to GDSII, ensuring timing, power, area and signal integrity goals are met.

The role involves floorplanning, placement, CTS, routing, STA, DRC/LVS, EM/IR checks, and automation scripting to streamline tape-out schedules. Collaboration with RTL, verification and design teams is essential.

Qualifications

• Experience implementing and optimizing ASIC/SoC physical design flows from netlist to GDSII.
• Proficiency in timing, power, area and signal integrity analysis and optimization.
• Strong scripting skills to automate design flows and checks.

Responsibilities

• Perform end-to-end physical design activities including floorplanning, placement, CTS, routing, physical verification and timing closure.

Skills

Floorplanning

Placement

CTS

Routing

Physical verification

Timing closure

STA

PPA improvements

Congestion analysis

Automation scripting

Tools

TCL

Perl

Python

Shell

Job description

We are seeking a highly motivated Physical Design Engineer to join our VLSI design team. The ideal candidate will be responsible for implementing and optimizing ASIC/SoC physical design flows from netlist to GDSII, ensuring timing, power, area, and signal integrity goals are achieved.

Key Responsibilities

• Perform end-to-end physical design activities including:
• Floorplanning
• Placement
• Clock Tree Synthesis (CTS)
• Routing
• Physical Verification
• Timing Closure
• Analyze and fix setup/hold violations.
• Perform congestion analysis and optimization.
• Drive power, performance, and area (PPA) improvements.
• Execute Static Timing Analysis (STA) and timing signoff.
• Work on IR drop, electromigration (EM), and signal integrity checks.
• Collaborate with RTL, DFT, Verification, and Design teams for design closure.
• Support physical verification activities including DRC, LVS, and ERC.
• Develop and maintain automation scripts using TCL, Perl, Python, or Shell.
• Debug and resolve implementation issues to meet tape-out schedules