Senior Design Verification Engineer

7Rays Semiconductors; Dadri; On-site; INR 800,000 - 1,200,000; Full time

Job summary

A semiconductor design company in India is seeking a candidate with over 5 years of experience to develop SV/UVM testbenches for IP/SOC and Subsystems. The ideal applicant should have a B.Tech/M.Tech in Electronics/VLSI and be proficient in SystemVerilog and UVM methodology. You'll be responsible for integrating various VIPs, running regressions, and debugging. Familiarity with low power verification and scripting languages like Python or Perl is a plus.

Qualifications

• 5+ years of experience in developing IP/SOC or SubSystems level testbenches.
• Able to work in complex SV/UVM environment and modify testbenches accordingly.
• Experience in low power verification and regression management.

Responsibilities

• Develop SV/UVM testbench for IP/SOC/Subsystems.
• Integrate various VIPs and write test plans.
• Run regressions and debug, develop scoreboards and checkers.

Skills

SystemVerilog

UVM methodology

Object-Oriented Programming concepts

SPI

I2C

UART

Python

Perl

Education

B.Tech/M.Tech in Electronics/VLSI

Job description

At 7Rays Semiconductors (https://7rayssemi.com/), we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies

We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a proven track record of successful projects, we are committed to excellence and innovation in semiconductor design.

Location: Noida/NCR

Experience: 5+ Years

Job Description:

To Develop SV/UVM testbench for IP/SOC/ Subsystems, Integrate various VIPs, come up with a testplan, write focussed/random/constrained-random sequences, run regressions and debug. Write coverpoints and drive coverage . Develop scoreboard, checkers and monitors.

Requirement :

• Should possess B.Tech/M.Tech in Electronics/VLSI or equivalent.
• Experience in developing IP/SOC or SubSystems level testbenches from scratch.
• Should be able to work in complex SV/UVM environment, modify testbench as per requirement.
• Should be very well conversant with SV/UVM methodology, OOP concepts.

Should have worked on one or more domains/functions below

• SPI,I2C, UART
• UCIe, PCIe, USB, Ethernet, CXL, Ucie, C2C, D2D
• DDR4/5/6, LPDDR3/4/5/6
• NoC/Interconnect verification

Should have involved in some of the below activities

• Low Power Verification
• Constraint Random sequence writing
• Regression management and debug
• Development of Scoreboard, Checkers and tracker.
• Scripting language like PERL,PYTHON
• AI/ML network understanding (good to have).