Senior Design Verification Engineer

Coventine Digital Private Limited

Bengaluru

On-site

INR 1,200,000 - 2,000,000

Full time

14 days+

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Job summary

A leading company in IT Services and Semiconductor Manufacturing is seeking a Design Verification Engineer to work closely with integration teams. Candidates should have proven experience in DFX/DFD and strong technical skills in verification processes. This full-time role offers the opportunity to contribute to cutting-edge projects in a collaborative environment.

Qualifications

6-15+ years of experience in Design Verification.
Strong communication and teamwork skills.
Hands-on with industry-standard debugging tools.

Responsibilities

Collaborate with IP and SoC teams to implement DFD/DFX features.
Develop and maintain test benches for verification.
Debug complex design and integration issues.

Skills

DFX

DFD

Verilog

System Verilog

C/C++

Assembly

Shell scripting

Debugging

Functional Verification

Job description

Experience : 6 - 15+ years (Hands on Experience)

Location : Bengaluru, Pune and Noida

Notice Period : Immediate to 30 days

Project Type : ODC / Inhouse

Role Summary:

We are looking for a Design Verification Engineer with experience in DFX (Design for excellence) and DFD (Design for Debug). The ideal candidate will work closely with IP and SoC integration teams to implement and verify debug and test features at block and system levels.

NOTE: This is not a DFT role.

Key Responsibilities:

Collaborate with IP and SoC teams to define and implement DFD/DFX features.
Work on debug features, test point optimization, and JTAG debugger integration.
Develop and maintain test benches and perform functional and SoC-level verification.
Debug complex design and integration issues using industry-standard tools.
Contribute to emulation, product characterization, and feature validation.

Required Skills:

Strong experience in DFX/DFD, including exposure to Scan, BIST, and JTAG.
Good understanding of verification flows and debugging at SoC/System level.
Hands-on with Verilog, System Verilog, or System C for test bench/model development.
Experience in Functional Verification, SoC Verification, or Emulation.
Proficient in System Verilog, C/C++, Assembly, Perl/Shell scripting.
Familiarity with OVM/UVM methodologies.
Exposure to ARM or x86 architecture-based SoCs is a plus.
Strong communication and teamwork skills.