RTL Design Verification Engineer-PQAngels

Pqangels Technologies; Bengaluru; On-site; INR 1,000,000 - 2,100,000; Full time

Benefits offered by this job

Onsite Opportunities

Fixed Pay

Health Insurance

Relocation Assistance

Job summary

PQAngels Technologies Pvt Ltd is hiring a Design Verification Engineer in Bengaluru. The role focuses on SoC/IP verification using SystemVerilog and UVM, with responsibilities spanning verification plans, reusable environments, and regression.

Ideal candidates have 4–11 years of experience in ASIC/VLSI verification, strong debugging skills, and exposure to AMBA/AXI/PCIe protocols. Onsite opportunities, relocation assistance, health insurance, and fixed pay are provided.

Qualifications

• Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field.
• Strong knowledge of SystemVerilog, UVM and SVA.
• Experience with Functional Coverage and Protocol Verification.
• Proficiency with Python or TCL and EDA tools.

Responsibilities

• Develop verification plans and reusable UVM environments.
• Perform functional coverage closure and assertions debugging.
• Conduct regression execution and testbench development.
• Perform root cause analysis and protocol verification across AMBA/AXI/APB, PCIe, DDR, USB, Ethernet.
• Collaborate with RTL and PD teams and engage with customers as needed.

Skills

SystemVerilog

UVM

SVA

Functional Coverage

AMBA/AXI/AXI/PCIe/DDR/USB/Ethernet

Python/TCL

EDA Tools

VCS

Xcelium

QuestaSim

Verdi

Education

Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field

Tools

EDA Tools

VCS

Xcelium

QuestaSim

Verdi

Job description

Design Verification Engineer

PQAngels Technologies Pvt Ltd

Experience: 4-11 Years | Location: Bengaluru, Hyderabad, Chennai | Employment Type: Full-Time

About PQAngels

PQAngels is a product engineering company built for the silicon-to-software stack. Founded by engineers, we help customers accelerate innovation through Semiconductor, ASIC, VLSI, Embedded and Product Engineering services.

Role Summary

We are seeking experienced Design Verification Engineers with strong UVM expertise for SoC/IP verification.

Key Responsibilities

• Develop verification plans.
• Build reusable UVM environments.
• Functional coverage closure.
• Assertions and debugging.
• Regression execution.
• Testbench development.
• Root cause analysis.
• Protocol verification.
• Customer interactions.
• Documentation.
• Verification signoff activities.
• Collaborate with RTL and PD teams.

Mandatory Technical Skills

• SystemVerilog
• UVM
• SVA
• Functional Coverage
• Protocol Verification (AMBA , AXI, APB, AHP, PCIe, DDR, USB, Ethernet)
• Python/TCL
• EDA Tools
• VCS
• Xcelium
• QuestaSim
• Verdi

Qualifications

Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field.

Soft Skills

Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams.

Why Join PQAngels ?

Work on advanced semiconductor projects, collaborate with experienced engineers and gain exposure to global customers.

• Onsite Opportunities
• Fixed Pay
• Health Insurance
• Relocation Assistance