Design Verification Engineer ( 4+ Years Experience)

PQAngels Technologies Pvt. Ltd

Bengaluru

On-site

INR 1,500,000 - 2,300,000

Full time

14 days+

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Benefits offered by this job

Competitive compensation

Exposure to global semiconductor proj.

Collaborative work environment

Cutting-edge technologies

Job summary

PQAngels Technologies Pvt. Ltd seeks an experienced ASIC Design Verification Engineer for an on-site role in the Greater Bengaluru Area. You will verify complex ASIC designs using UVM/SVA methodologies, develop test benches, write test cases, and review coverage metrics.

Collaboration with RTL and PD teams is essential for ensuring performance and quality. The ideal candidate has strong experience with UVM, SVA, functional coverage, and industry tools like VCS and QuestaSim, and holds a relevant

Qualifications

Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field.

Responsibilities

Build reusable UVM environments.
Achieve functional coverage closure.
Implement assertions and debugging.
Perform root cause analysis for issues.
Conduct protocol verification for ASIC/SoC.
Interact with customers and stakeholders as needed.
Document verification results and processes.
Sign off on verification activities and collaborate with RTL/PD teams.

Skills

UVM

SVA

Functional Coverage

Python/TCL EDA Tools

VCS

QuestaSim

PCIE

DDR

USB

UCIE ASIC/SoC

Education

Bachelor's or Master's in Electronics/Electrical/ECE/VLSI/Microelectronics

Job description

PQAngels Technologies Pvt. Ltd | Full time

PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions.

Job Description

Company Description :

Role Description :

The ASIC Design Verification Engineer – PQAngels will be responsible for verifying complex ASIC designs using industry-standard methodologies and tools. Day-to-day activities include developing verification plans, creating and maintaining test benches, writing test cases, performing functional and formal verification, and analyzing coverage metrics. The role involves close collaboration with RTL design engineers and architects to understand specifications, identify corner cases, and debug design and verification issues. The engineer will document findings, contribute to process improvements, and ensure that designs meet performance, reliability, and quality requirements. This is a full-time, on-site role based in the Greater Bengaluru Area.

Requirements

Key Responsibilities :

Build reusable UVM environments.
Functional coverage closure.
Assertions and debugging.
Root cause analysis.
Protocol verification.
Customer interactions.
Documentation.
Verification sign off activities.
Collaborate with RTL and PD teams.

Mandatory Technical Skills :

UVM
SVA
Functional Coverage
Python/TCL EDA Tools
VCS
QuestaSim
PCIE ,DDR, USB, UCIE ASIC or SoC projects

Qualifications :

Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams.