RTL ASIC Front End Design Engineer Lead and above

Tessolve; Bengaluru; On-site; INR 1,500,000 - 3,000,000; Full time

Job summary

A leading company in semiconductor manufacturing is seeking an RTL ASIC Front End Design Engineer Lead and above. The role requires 5+ years of experience in SoC/IP design, with strong RTL coding skills and leadership experience. The ideal candidate will have expertise in various design methodologies and protocols. Join a diverse team committed to innovation and success.

Qualifications

• 5 to 20 years of experience in SoC/IP Design.
• Expertise in writing detailed IP specifications and micro-architecture.

Responsibilities

• Ownership and delivery of sub-systems or top-level SoC projects.
• Leadership experience in managing engineering teams and project timelines.

Skills

RTL ASIC

CDC

Lint

Micro-architecture

Timing & Synthesis

scripting

Job description

RTL ASIC Front End Design Engineer Lead and above

Get AI-powered advice on this job and more exclusive features.

Direct message the job poster from Tessolve

TESSOLVE | Talent Acquisition | Global hiring | Headhunter | Leadership hiring | VLSI # DFT # DV # RTL # Semiconductor # Semicon hiring

Immediate hiring!!!

Tessolve Semiconductors is hiring for the following positions:

Position: RTL ASIC Design Engineer - Sr Engineer/Lead and above

Experience: 5+ to 20 years

Notice period: Immediate to 30 days preferred

Design: RTL ASIC Engineer/Lead

Skills: RTL ASIC, CDC, Lint, integration, Micro-architecture, Timing & Synthesis, scripting (TCL/Perl/Python)

Requirements:

• 5 to 20 years of experience in SoC/IP Design
• Expertise in writing detailed IP specifications, micro-architecture, IP design, subsystem and SoC level integration
• Proficiency in RTL development, coding standards, lint, CDC tools, verification, debugging, and coverage analysis
• Deep understanding of clocking methodology and low power implementation
• Experience with constraints, synthesis, timing analysis, and DFT
• Knowledge of power partitioning and CPF/UPF usage
• Exposure to IP design for ARM microcontrollers
• Understanding of AMBA protocols (AXI, AHB, ATB, APB)
• Knowledge of interface protocols like PCIe, DDR, Ethernet, I2C, UART, SPI
• Experience with Matlab simulations and digital signal processing IPs
• Experience developing security IPs and on-chip memory/flash controllers

Lead Role:

• Strong RTL coding skills
• Ownership and delivery of sub-systems or top-level SoC projects
• Leadership experience in managing engineering teams and project timelines

About us:

Tessolve Semiconductors, a venture of Hero Electronix, provides end-to-end design and test engineering solutions across various domains including product engineering, hardware, software, wireless, automotive, and embedded systems. With over 2500 employees worldwide, Tessolve offers comprehensive hardware and software capabilities, advanced testing labs, and turnkey ASIC solutions from design to packaged parts. Our global offices span the US, India, Singapore, Malaysia, Germany, UK, China, Japan, Thailand, and the Philippines.

Our commitment to diversity: We foster an inclusive environment that values diversity in all forms, believing it drives innovation and success. We ensure fair treatment and aim to eliminate biases, creating a respectful workplace for all employees.

Please share or refer to the following email ID:

Seniority level: Mid-Senior level

Employment type: Full-time

Job function: Engineering, Other, and Design

Industries: Semiconductor Manufacturing

Referrals can increase your chances of interviewing at Tessolve by 2x.

Get notified about new ASIC Design Engineer jobs in Bengaluru, Karnataka, India.

}