Principal Layout Engineer-DPG-LPDDR Hyderabad, Telangana, India Posted a day ago

Micron Technology, Inc; Hyderabad; On-site; INR 3,500,000 - 5,500,000; Full time

Benefits offered by this job

Medical, dental & vision plans

Paid time-off

Paid holidays

Job summary

Micron Technology, Inc in Hyderabad is seeking a Principal Layout Engineer (DPG-LPDDR) with 15+ years' hands-on experience in analog, mixed-signal, memory and high-speed interface layout. You will lead full-chip floor planning, physical implementation, signoff, and tape-out, while mentoring global teams to achieve technical excellence.

You will drive AI-assisted layout methodologies and automation, leveraging Cadence Virtuoso, Calibre, StarRC and Totem to deliver high-quality silicon products.

Qualifications

• 15+ years of hands-on custom layout experience.
• Proven success leading full-chip programs from concept through silicon tape-out.
• Experience with LPDDR, HBM, NAND, SERDES, PCIe, UCIe, or advanced SoC products.
• Strong proficiency with Python, SKILL, Tcl, and automation in design flows.

Responsibilities

• Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution.
• Drive layout implementation of analog, mixed-signal, memory, and high-speed interface designs.
• Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure.
• Define and scale layout methodologies, best practices, and execution frameworks.
• Leverage AI/Agentic AI to improve layout productivity and automation.
• Lead cross-functional and global teams, mentor engineers, and drive technical excellence.

Skills

Full-Chip Floor planning & Integration

Analog & Mixed-Signal Layout

Memory & High-Speed Interface Layout

Signal Integrity, Power Integrity

AI/Generative AI for design automation

Python

Tcl

Automation

Leadership

Communication

Education

B.Tech / M.Tech in Electrical Engineering, Electronics, VLSI or related field

Tools

Cadence Virtuoso

Calibre

StarRC

Totem

Job description

Req. ID: JR108773 Principal Layout Engineer-DPG-LPDDR

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Key Responsibilities

• Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution.
• Drive layout implementation of complex analog, mixed-signal, memory, and high-speed interface designs.
• Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure.
• Define and scale layout methodologies, best practices, and execution frameworks.
• Leverage Artificial Intelligence, Machine Learning, and Agentic AI to improve layout productivity, design quality, automation, and faster decision-making.
• Drive automation initiatives using AI-assisted design, verification, debugging, and knowledge management solutions.
• Lead cross-functional and global teams, mentor engineers, and drive technical excellence.

Qualifications

• B. Tech /M. Tech in Electrical Engineering, Electronics, VLSI, or related field.
• 15+ years of hands-on custom layout experience.
• Proven success leading full-chip programs from concept through silicon tape-out.
• Analog & Mixed-Signal Layout
• Memory & High-Speed Interface Layout
• Full-Chip Floor planning & Integration
• Signal Integrity, Power Integrity, EM/IR
• Physical Verification & Signoff
• Advanced Node Technologies (FinFET/GAA)
• Strong proficiency with Cadence Virtuoso, Calibre, StarRC, Totem, and related EDA tools.
• Proven experience leveraging AI/Generative AI/Agentic AI to enhance engineering productivity and design automation.
• Excellent technical leadership, communication, and problem-solving skills.
• Experience with LPDDR, HBM, NAND, SERDES, PCIe, UCIe, or advanced SoC products.
• Strong Python, SKILL, Tcl, and automation expertise.
• Experience building and deploying AI-powered engineering workflows and intelligent design agents.

Job Profile(s): Semiconductor Design Engineer 4

Relocation level: (TBD)

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth.

• We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
• Additionally, Micron benefits include a robust paid time-off program and paid holidays.

For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.