Principal Layout Engineer-DPG-LPDDR

1840 Micron Tech. OP India LLP; New Delhi; On-site; INR 6,000,000 - 9,000,000; Full time

Job summary

Micron Technology, Inc. in India seeks a senior layout engineer to lead full-chip floor planning, physical implementation, and tape-out for advanced memory and SOC designs.

You will drive AI-powered automation, mentor global teams, and ensure design closure with DRC/LVS/ER. Requires 15+ years in analog/mixed-signal layouts, Cadence tool expertise, and high-speed interface experience. On-site opportunity in Delhi region with competitive compensation.

Qualifications

• 15+ years of hands-on custom layout experience.
• Proven success leading full-chip programs from concept through silicon tape-out.
• Deep expertise in Analog & Mixed-Signal Layout, Memory & High-Speed Interface Layout, Full-Chip Floor planning & Integration.
• Signal Integrity, Power Integrity, EM/IR Physical Verification & Signoff.
• Experience with AI/Generative AI/Agentic AI to enhance productivity and automation.

Responsibilities

• Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution.
• Drive layout implementation of analog, mixed-signal, memory, and high-speed interfaces.
• Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure.
• Define and scale layout methodologies, best practices, and execution frameworks.
• Leverage AI to improve layout productivity, design quality, automation, and faster decision-making.
• Drive automation initiatives with AI-assisted design and knowledge management.

Skills

Leadership

Communication

Problem-solving

Automation

AI Experience

Education

B.Tech / M.Tech in Electrical Engineering / Electronics / VLSI

Tools

Cadence Virtuoso

Calibre

StarRC

Totem

Python

SKILL

Tcl

Job description

Key Responsibilities

Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution. Drive layout implementation of complex analog, mixed-signal, memory, and high-speed interface designs. Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure. Define and scale layout methodologies, best practices, and execution frameworks. Leverage Artificial Intelligence, Machine Learning, and Agentic AI to improve layout productivity, design quality, automation, and faster decision-making. Drive automation initiatives using AI-assisted design, verification, debugging, and knowledge management solutions. Lead cross-functional and global teams, mentor engineers, and drive technical excellence.

Qualifications

B. Tech /M. Tech in Electrical Engineering, Electronics, VLSI, or related field. 15+ years of hands-on custom layout experience. Proven success leading full-chip programs from concept through silicon tape-out. Deep expertise in: Analog & Mixed-Signal Layout Memory & High-Speed Interface Layout Full-Chip Floor planning & Integration Signal Integrity, Power Integrity, EM/IR Physical Verification & Signoff Advanced Node Technologies (FinFET/GAA) Strong proficiency with Cadence Virtuoso, Calibre, StarRC, Totem, and related EDA tools. Proven experience leveraging AI/Generative AI/Agentic AI to enhance engineering productivity and design automation. Excellent technical leadership, communication, and problem-solving skills. Experience with LPDDR, HBM, NAND, SERDES, PCIe, UCIe, or advanced SoC products. Strong Python, SKILL, Tcl, and automation expertise. Experience building and deploying AI-powered engineering workflows and intelligent design agents.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact [e-mail]

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.