Principal Engineer- DEG Layout Bengaluru, Karnataka, India Posted a day ago

Micron Technology, Inc; India; On-site; INR 3,000,000 - 6,000,000; Full time

Benefits offered by this job

Medical plan

Dental plan

Vision plan

Paid time off

Paid holidays

Job summary

Micron Technology, Inc in India is seeking a Principal Engineer- DEG Layout to lead layout design for critical analog, mixed-signal, and digital blocks, delivering high-quality block layouts on schedule.

You will perform LVS/DRC checks, guide sub-block layouts, and collaborate with global engineering teams. The role emphasizes AI-assisted layout efficiency and on-time project execution. Relocation is TBD.

Qualifications

• Experience in analog, mixed-signal, and digital layout for complex SOC blocks.
• Proficient in LVS/DRC, antenna, and EM/IR checks with documentation.
• Ability to deliver block-level layouts on time with quality.

Responsibilities

• Design and develop analog, mixed-signal, and digital layouts.
• Perform layout verification including LVS/DRC and antenna checks.
• Develop digital block layouts using auto placement and routing.
• Guide sub-block layouts and review team work.
• Coordinate with global engineering teams to ensure project success.
• Drive layout efficiency using AI techniques.

Skills

Layout design

LVS/DRC verification

Leadership

Cross-functional collaboration

Tools

Auto placement & routing tools

Skill scripting basics

AI-assisted layout

Job description

Req. ID: JR102179 Principal Engineer- DEG Layout

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Role and Responsibilities

• Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level.
• Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation.
• Responsible for development of digital block layouts using auto placement and route tools
• Responsible for basic understanding of skill coding and automation
• Responsible for on-time delivery of block-level layouts with acceptable quality.
• Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment.
• Guide team members in their execution of Sub block-level layouts & review their work
• Effectively communicating with Global engineering teams to assure the success of layout project.
• Responsible for the reducing the layout effort by using AI

Job Profile(s)

Semiconductor Design Engineer 5

Relocation level: (TBD)

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.