PCIe gen 6/7 DV Engineer

Central Business Solutions; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Central Business Solutions is seeking a skilled PCIe Design Verification Engineer with 5+ years of hands-on ASIC/SoC verification experience, focusing on PCIe Gen 6 and/or Gen 7. The role involves developing UVM-based verification environments to ensure protocol compliance and high coverage.

The ideal candidate will have expertise in test plan creation, debugging complex failures, and driving coverage closure to sign off verification.

Qualifications

• 5+ years of hands-on ASIC/SoC verification experience.
• Proficient in verifying PCIe protocol functionality and compliance.
• Experience developing and executing test plans for PCIe verification.
• Skilled in debugging complex verification failures and driving coverage closure.

Responsibilities

• Develop UVM-based verification environments for PCIe designs and IP.

Skills

PCIe verification

UVM framework

ASIC/SoC verification

Gen6/Gen7 PCIe

Test plan development

Tools

UVM

Job description

skilled PCIe Design Verification Engineer with 5+ years of hands-on ASIC/SoC verification experience and strong expertise in PCIe Gen 6 and/or Gen 7. The engineer will be responsible for developing UVM-based verification environments.

Required Candidate profile

• creating comprehensive test plans.
• verifying PCIe protocol functionality and compliance.
• debugging complex failures.
• driving coverage closure through verification sign-off.