Design Verification Engineers (DV)

Proziod Analytics Pvt. Ltd.; Bengaluru; On-site; INR 1,500,000 - 2,800,000; Full time

Job summary

Proziod Analytics Pvt. Ltd. in Bengaluru is hiring Design Verification Engineers for PCIe Design IP R&D team. Immediate to 60 days notice. 5+ years of design verification experience required.

Strong SV/UVM testbench development skills and PCIe/CXL protocol knowledge are must. Join our team to lead end-to-end IP verification activities and build robust UVM-based test benches.

Qualifications

• 5+ years of design verification experience, with strong SV/UVM.
• Hands-on testbench development and verification planning.
• Good working knowledge of PCIe and CXL protocols.

Responsibilities

• Lead end-to-end IP verification activities.
• Develop detail test plans and verification strategies.
• Build and maintain UVM-based test benches using SystemVerilog.
• Knowledge of PCIe/AXI/APB protocols is required.

Skills

SV/UVM

Testbench development

PCIe protocol

CXL protocol

5+ years experience

Job description

We are hiring Design verification Engineers PCIe Design IP R & D Team at Bangalore.

Skills:

• Strong Experience in SV/UVM/Test bench development
• Working knowledge of PCIe / CXL Protocol
• Experience: 5+ yrs

Notice period: Immediate to 60 days

Salary : Best in Industry

Key Responsibilities

• Lead end to end IP verification activities
• Develop detail test plans and verification strategies
• Build and maintain UVM based test benches using system verilog
• Knowledge of protocols (AXI/ AHB/APB) and PCIe is must