Memory Design Engineer

Exiger Technologies; Bengaluru; Presencial; INR 1.400.000 - 2.100.000; Jornada completa

Descripción de la vacante

Exiger Technologies in Bengaluru leads memory circuit design and development for SRAM/MRAM technologies. The role focuses on designing and optimizing memory circuits, sense amplifiers, decoders, and timing/control blocks, with hands-on transistor-level work and SPICE simulations.

You will collaborate with Physical Design, Verification, DFT and Product Engineering teams to push memory margin and PPA across PVT corners, and contribute to advanced CMOS/FinFET memory tech.

Formación

• Experience with memory circuit design, SRAM and MRAM is preferred.
• Hands-on transistor-level design and SPICE simulations required.
• Experience optimizing Power, Performance & Area (PPA) for memory circuits.

Responsabilidades

• Design and optimize SRAM/MRAM memory circuits.
• Work on Sense Amplifiers, Write Drivers, Decoders and Timing/Control Circuits.
• Perform transistor-level design and SPICE simulations.
• Drive Power, Performance & Area (PPA) optimization.
• Perform memory characterization and margin analysis across PVT corners.
• Collaborate with Physical Design, Verification, DFT and Product Engineering teams.

Conocimientos

Memory circuit design

SRAM design

MRAM design

Transistor-level design

SPICE simulations

PPA optimization

PVT margin analysis

Herramientas

SPICE

CMOS / FinFET technologies

Descripción del empleo

Key Responsibilities

• Design and optimize SRAM/MRAM memory circuits
• Work on Sense Amplifiers, Write Drivers, Decoders and Timing/Control Circuits
• Perform transistor-level design and SPICE simulations
• Drive Power, Performance & Area (PPA) optimization
• Perform memory characterization and margin analysis across PVT corners
• Work closely with Physical Design, Verification, DFT and Product Engineering teams

Good to Have

Experience with advanced CMOS / FinFET technologies.

Ideal Candidate

Candidates with strong hands-on Memory Circuit Design experience in SRAM and/or MRAM are preferred.