R&D Engineering, Manager

Synopsys Inc

Hyderabad

On-site

INR 4,000,000 - 7,000,000

Full time

4 days ago
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Job summary

Synopsys Inc. is seeking an experienced engineering manager to lead the Embedded Memory and Logic team in Hyderabad. You will drive design of memory blocks, SRAMs, ROMs and TCAMs across architecture and physical implementation, coordinating with CAD teams to ensure verification and model generation.

The role requires deep submicron and FinFET memory experience, scripting for automation, and the ability to guide cross-functional teams toward project deadlines.

Qualifications

  • 10yrs+ exposure to full embedded memory design flow including architecture, circuit design, physical implementation, characterization and model generation.

Responsibilities

  • Manage a team and develop SRAM, Register file, TCAM and ROM architectures and circuit implementation techniques.

Skills

Memory design
SRAM architectures
Register files
Team leadership
Digital design knowledge

Education

BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering

Tools

CAD tools
Schematic entry & layout planning
Verilog/VHDL (design)
Python
Perl

Job description

Job Description And Requirements

The Embedded Memory and Logic Team is part of Solutions Group and is responsible for standard and custom embedded SRAMs/ROMs/TCAMs development and provides both functional and physical views of memory in form of Memory compilers, A semiconductor intellectual property (IP) for the design of complex integrated circuits. The team is completely responsible for all aspects of memory development starting from Bit Cell Analysis, Architecture Design, Characterization and Verification.

Embedded memory design
Job Description And Requirements

The Embedded Memory and Logic Team is part of Solutions Group and is responsible for standard and custom embedded SRAMs/ROMs/TCAMs development and provides both functional and physical views of memory in form of Memory compilers, A semiconductor intellectual property (IP) for the design of complex integrated circuits. The team is completely responsible for all aspects of memory development starting from Bit Cell Analysis, Architecture Design, Characterization and Verification.

Responsibilities
  • Manage a team and develop SRAM/Register file /TCAM /ROM architectures and circuit implementation techniques.
  • Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.
  • Designing and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures.
  • Learn and apply skills in memory compilers having Transistor level circuit Design.
  • Resolves a wide range of issues in creative ways
  • Inter-team interaction
  • Customer focus
  • Frequently networks with senior internal and external personnel in own area of expertise
  • Experience of FinFet Technology for Memory Design
  • Can coordinate, facilitate, and monitor the daily activities of a small to large group of support resources within their section or project team
  • With minimal supervision, prioritizes workload to successfully manage multiple tasks and responsibilities
  • Proactively addresses and communicates issues impacting productivity

As a Manager, the individual will be involved in challenging projects and drive it to completion in record time.

You will quickly ramp on the existing flow, understand the challenges, and produce the work plan.

Your expertise in deep submicron technology and Finfet, SRAM design, processor design, Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.

You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.

Skills/Experience:
  • 10yrs+ Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
  • BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from premium institute/university
  • Deep understanding of SRAM/Register File architectures and advanced custom circuit implementations.
  • Direct experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometre technology nodes
  • Mastery in scripting using Perl, python for automation
Fundamentals:
  • Understanding of RC circuit of 1st and 2nd order.
  • Basics of Digital design (realization of Boolean function using Gates, Mux etc)
  • Fundamentals of Transfer function and its analysis for stability etc.
  • Strong CMOS fundamentals
  • Knowledge of CMOS fabrication
  • Good digital design knowledge
  • Exposure to basic Analog fundamentals

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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