Manager - Design Engineering

Tessolve

Bengaluru

On-site

INR 1,200,000 - 1,800,000

Full time

2 days ago
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Job summary

Tessolve is seeking an experienced RTL design engineer to translate architectures into robust Verilog/SystemVerilog RTL blocks for ASIC/SoC projects in Bengaluru. You will work closely with verification and physical design teams to ensure timing, power, and area targets are met.

The role requires strong HDL proficiency, a solid understanding of digital design fundamentals, and hands-on experience with AMBA protocols (AXI/AHB/APB). Prior ASIC/SoC design exposure is essential.

Qualifications

  • Proficiency in Verilog and SystemVerilog HDL for RTL design.
  •  

Responsibilities

  • Design and develop synthesizable RTL using Verilog/System Verilog.

Skills

Verilog
SystemVerilog
Digital design fundamentals
Computer architecture
AMBA protocols (AXI/AHB/APB)
Synthesis/timing/low-power design
Simulation/debugging tools
ASIC/SoC design environments

Education

Bachelor's degree in Electrical Engineering or Computer Engineering
Master's degree in Electrical/Computer Engineering (preferred)

Job description

Key Responsibilities
  • Design and develop synthesizable RTL using Verilog/System Verilog
  • Translate architecture specifications into micro-architecture and RTL implementation
  • Develop high-performance and low-power digital design blocks
  • Work closely with verification teams for functional validation and debug
  • Perform design reviews and ensure coding quality and design guidelines
  • Collaborate with physical design teams to meet timing, power, and area requirements
  • Debug RTL issues and support silicon bring-up when required
Required Skills
  • Strong expertise in Verilog and System Verilog
  • Solid understanding of digital design fundamentals and computer architecture
  • Experience with AMBA protocols such as AXI, AHB, and APB
  • Knowledge of synthesis, timing closure, and low-power design techniques
  • Familiarity with simulation and debugging tools
  • Experience working in ASIC/SoC design environments
Preferred Qualifications
  • Strong debugging and problem-solving skills
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field.
  • Strong understanding of digital logic design principles.
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