Low Power Design Engineer(NPU)-Sr Lead

Qualcomm; Bengaluru; On-site; INR 800,000 - 1,200,000; Full time

Job summary

Qualcomm is seeking a Hardware Engineer in Bengaluru, India to work on power specifications and validations for DSP IPs. The role requires strong expertise in UPF, power analysis, and collaboration with cross-functional teams.

A Bachelor's degree in Computer Science or related field along with relevant experience is required. This position offers a dynamic work environment with opportunities to impact power development during hardware implementation.

Qualifications

• Bachelor's degree in related field with 3+ years of experience.
• Master's degree in related field with 2+ years of experience.
• PhD in related field with 1+ year of experience.

Responsibilities

• Write and validate power specs for DSP IPs.
• Develop power intent using UPF based on design specs.
• Track dynamic and leakage power projections.

Skills

Power analysis

TCL

Perl

Communication skills

Power specification writing

Education

Bachelor's degree in Computer Science or related field

Master's degree in Computer Science or related field

PhD in Computer Science or related field

Tools

PTPX

Job description

General Summary

• Hands on experience in writing UPF based on power spec for block/SOC having complex power crossings
• Hands on experience in validating power intent using CLP
• Hands on experience on Power analysis using PTPX
• Understanding of issues related to MV cell (isolation, level shifter, retention, etc) insertion during synthesis
• Good understanding of optimization of dynamic & leakage power during RTL development and physical implementation
• Good understanding of power correlation between Pre‑Si and Post‑Si
• Automation skill in TCL and/or Perl
• Good communication skill

Additional Job Description

• Creating power spec for Qualcomm DSP IPs based on the design spec
• Power intent development using UPF for DSP IPs based on power spec
• Power intent validation at RTL level , Gate level (synthesis , PD ) using CLP
• Fixing power intent based on PA DV feedback for any issue related to power intent Debugging issues related to MV cell insertion during synthesis and modifying UPF accordingly
• Dynamic and Leakage power projection of DSP IPs during start of the project
• Dynamic and Leakage power number generation using PTPX and tracking the same at different stages of implementation flow
• Highlighting issues related to dynamic and leakage power mismatch compared to the target and working with Synthesis and PD teams to fix the issues
• Working with cross‑function teams (SOC, Sub System etc) for smooth handoff of power intent and Dynamic & leakage power number at different stages of project execution

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience

Qualcomm is an equal opportunity employer.