Senior Lead RTL/Synthesis Engineer

Qualcomm; Dadri; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Qualcomm India Private Limited is seeking a Senior SoC Power Engineer to lead power-related tasks for complex SoCs. The role includes UPF/CPF development, clocktree/netlist power recovery, and both static and dynamic power analysis using PTPX.

You will work on low-power isolation strategies and multi-rail power architectures within the SoC domain. The position targets engineers with 3–8 years in hardware engineering, with strong background in low power techniques and UPF development for

Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• 3-8 yrs of working exp; must have experience in low power design techniques; UPF development and review; Power analysis at SoC level.

Responsibilities

• Lead SoC Power tasks.
• Development of UPF/CPF working with IPs for the SoC.
• Power analysis and recovery on clocktree/netlists during various PD stages.
• Static/Dynamic Power analysis using PTPX.
• Isolation strategy for low power.
• Multi-power rail based Power architecture.

Skills

Low power design techniques

UPF development

Power analysis at SoC level

SoC Power tasks

Education

Bachelor's degree in CS/EE/Engineering

Master's degree in CS/EE/Engineering

PhD in CS/EE/Engineering

Tools

PTPX

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• OR
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• OR
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Role:

• To lead SoC Power tasks
• Development of UPF/CPF working with IPs for the SoC
• Power analysis and recovery on clocktree/netlists during various PD stages
• Static/Dynamic Power analysis using PTPX
• Isolation strategy for low power
• Multi-power rail based Power architecture

Experience:

• 3-8 yrs of working exp
• Must have experience in low power design techniques
• UPF development and review
• Power analysis at SoC level

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