Lead STA Engineer

NXP Semiconductors

Bengaluru

On-site

INR 7,000,000 - 11,000,000

Full time

3 days ago
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Job summary

NXP Semiconductors in Bengaluru invites an experienced Lead STA Engineer to drive static timing analysis for complex ASIC/SoC designs, achieve timing closure, and mentor a small team across RTL, DFT and PD.

You will develop methodologies, work with global design teams, and own SDC constraints and timing signoff across MCMM scenarios with advanced technology nodes.

Qualifications

  • Master's or Bachelor's degree in Electronics/ Electrical Engineering, Computer Engineering, or related field.
  • 7+ years of hands-on experience in static timing analysis for complex ASIC/SoC designs.
  • Experience with multi-mode timing constraint development, execution, and final timing signoff for advanced technology nodes.

Responsibilities

  • Constraint development: Create, validate, and maintain SDCs for block and full-chip levels, including false paths and test modes.
  • Timing signoff: Perform exhaustive timing analysis across corners and modes (MCMM).
  • Violation debugging: Debug setup, hold, transition, and path-based violations.
  • Optimization & ECO: Drive timing closure via ECOs.
  • Cross-functional collaboration: Partner with RTL, physical design, and DFT teams.
  • Tool & flow automation: Develop/maintain flows with EDA tools and automation scripts.
  • Lead a small STA team.
  • IP level synthesis capabilities should be demonstrated.

Skills

Static timing analysis
STA tools
Primetime/Cadence
Clocking architectures
Scripting languages
Team leadership
Cross-functional collaboration

Education

Master's or Bachelor's in Electronics/EE/CE
Relevant field degrees

Tools

Synopsys PrimeTime
Cadence Tempus

Job description

Summary: Seeking a highly skilled and experienced Lead STA Engineer to lead and execute static timing analysis for complex semiconductor designs, ensuring timing closure and performance targets are met. This role involves guiding a team, developing methodologies, and collaborating with design and verification teams to deliver high-quality products.

Job Qualification

Master's degree or Bachelor's degree in Electronics/ Electrical Engineering, Computer Engineering, or a related field. 7+ years of hands-on experience in static timing analysis for complex ASIC/SoC designs. Experience of Multi mode timing constraint development, execution, and final timing signoff for advanced technology nodes Proven experience leading STA efforts for multiple successful tape-outs. Expertise in industry-standard STA tools (e.g., Synopsys PrimeTime, Cadence Tempus). Strong understanding of digital design fundamentals, clocking architectures, and low-power techniques In-depth knowledge of timing constraints (SDC) and their application. Proficiency in scripting languages such as Perl, Python, or TCL. Strong communication and interpersonal skills, with the ability to collaborate effectively in a global team environment. Work closely with Architects,Front End,DFT and the PD team to understand design,clocking,timing ,Requirements and lead the writing constraints and closing timing activities

Key Responsibilities
  • Constraint Development: Create, validate, and maintain Synopsys Design Constraints (SDC) for block and full-chip levels, covering false paths, multicycle paths, and test modes.
  • Timing Signoff: Perform exhaustive timing analysis across multiple corners and modes (MCMM), adhering to process, voltage, and temperature (PVT) variations.
  • Violation Debugging: Debug and resolve setup, hold, transition, and path-based violations (PBA).
  • Optimization & ECO: Drive timing closure by generating and evaluating timing Engineering Change Orders (ECOs).
  • Cross-functional Collaboration: Partner with RTL, physical design, and DFT teams to ensure robust timing integration and refine timing models.
  • Tool & Flow Automation: Develop and support implementation flows using industry-standard Electronic Design Automation (EDA) tools and improve script-based automation.
  • Drive a small team of STA engineers.
  • Should be able to do IP level synthesis.

More information about NXP in India... #LI-7013 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com

Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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