Senior Staff Engineer, Static Timing Analysis (STA) Lead

SiFive India Private Limited; Bengaluru; On-site; INR 2,500,000 - 3,500,000; Full time

Benefits offered by this job

Equal opportunity employer

Inclusive environment

Job summary

SiFive India Private Limited is seeking a highly experienced STA Engineer responsible for all timing-related aspects of high-speed data center scale CPUs. This role involves defining sign-off criteria and driving innovation to accelerate timing closure.

The ideal candidate will possess deep expertise in timing signoff, pertinent EDA tools, and a strong educational background in relevant fields with over 10 years of industry experience.

Qualifications

• Deep understanding of the complete Timing Signoff process.
• Proven experience taping out complex designs at the 3nm process node.
• Strong knowledge of physical design flow.
• Extensive experience in developing and debugging complex SDCs.
• Understanding of Clock Tree Synthesis architectures.

Responsibilities

• Act as primary contact for STA and timing items in CPU design.
• Develop methodologies for early timing convergence.
• Architect platforms to monitor timing convergence metrics.
• Lead quality assurance for SDCs.

Skills

Timing Signoff & Tools

Advanced Node Experience

Physical Design Flow

SDC Proficiency

Advanced Clocking

Education

Bachelor's or Master's in E&E, ECE, CS, VLSI, or PhD

Tools

Synopsys PrimeTime

Synopsys FusionCompiler

Job description

Job Description

About the Role

We are seeking a highly experienced STA Engineer to serve as the primary technical authority and owner for all timing-related aspects of our next-generation, high-speed data center scale CPUs. In this role, you will define sign-off criteria, drive advanced timing methodologies, and spearhead innovation to accelerate timing closure for massive, high-performance compute architectures at cutting-edge process nodes (N3/N2).

Key Responsibilities

• Technical Leadership: Act as the primary point of contact and subject matter expert for all STA and timing-related items across the high-speed CPU design team.
• Methodology Innovation: Develop and deploy "correct-by-construction" methodologies to proactively drive timing convergence early in the design cycle.
• Platform Development: Architect and maintain advanced tracking platforms to monitor and analyze timing convergence metrics across complex data center CPU blocks.
• Constraint Management: Lead SDC quality assurance and collaborate closely with cross-functional partners to ensure pristine, high-quality SDCs through our internal flows.

Required Qualifications

• Timing Signoff & Tools: Deep, authoritative understanding of the complete Timing Signoff process (defining criteria, margins, and closure). Expertise in Synopsys PrimeTime is a must.
• Advanced Node Experience: Proven, hands‑on experience taping out complex designs at the 3nm (N3) process node.
• Physical Design Flow: Strong working knowledge of the physical design flow, specifically transitioning from Synthesis through Place and Route (P&R).
• SDC Proficiency: Extensive experience in developing, managing, and debugging complex SDCs for massive SoC or CPU designs.
• Advanced Clocking: Strong understanding of Clock Tree Synthesis (CTS) architectures, including Mesh and Multi-Source CTS (MSCTS).
• Education Qualification: A bachelor's or master's in E&E, ECE, CS, VLSI, or PhD is required with 10+ years of experience.

Preferred Qualifications

• High‑Performance Compute: Direct, proven experience driving timing closure specifically for high-speed, data center scale CPUs.
• Next‑Gen Nodes: Exposure to or active experience with 2nm (N2) technology nodes is highly preferred.
• Advanced EDA Tools: Hands‑on experience with Synopsys FusionCompiler is highly preferred.
• AI/ML Integration: Knowledge of Machine Learning (ML)-based timing prediction techniques to reduce design iterations and accelerate sign‑off cycles.

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in India. Any offer of employment for this position is also contingent on the Company verifying that you are authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, the Company’s ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.