Lead Principal Engineer, Design Verification

Micron Technology; Hyderabad; On-site; INR 1,200,000 - 1,500,000; Full time

Job summary

Micron Technology is seeking an experienced verification engineer in Hyderabad, India, to own and execute functional verification for block-level and full-chip designs. The role includes developing and maintaining verification plans, architecting UVM-based testbenches, and collaborating with cross-functional teams. Ideal candidates will have strong experience in SystemVerilog and debugging, alongside a commitment to mentoring junior engineers. Micron offers a workplace committed to diversity and inclusion.

Qualifications

• Experience in functional verification for block-level and full-chip designs.
• Ability to develop and maintain verification plans and strategies.
• Strong understanding of debugging and analysis in verification.

Responsibilities

• Own and execute functional verification for designs.
• Develop, execute, and maintain verification plans.
• Architect and maintain SystemVerilog/UVM-based testbenches.
• Run simulations and debug functional failures.
• Drive coverage closure and identify verification gaps.
• Collaborate with design engineers to resolve issues.
• Provide verification status updates and risk assessments.
• Mentor and guide junior engineers.

Skills

SystemVerilog

UVM

Verification planning

Debugging

Communication

Job description

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities

• Own and execute functional verification for block‑level and full‑chip designs from specification through tape‑out
• Develop, execute, and maintain verification plans, test strategies, and coverage models based on design specifications
• Architect, develop, and maintain SystemVerilog / UVM‑based testbenches, test vectors, and assertions
• Run directed and constrained‑random simulations and debug functional failures to root cause
• Drive coverage closure (functional, code, and assertion coverage) and identify verification gaps
• Work closely with design engineers to understand RTL, review specifications, and resolve design issues
• Provide verification status updates, summaries, and risk assessments to project stakeholders
• Collaborate with cross‑functional teams including design, validation, product engineering, and methodology teams across global sites
• Contribute to the development and improvement of verification tools, flows, and methodologies
• Provide verification support to design projects by simulating, analyzing and debugging pre‑silicon full chip designs.
• Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.
• Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.
• Co‑work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design.
• Mentor and guide junior engineers, providing technical leadership within the verification team
• Effective and compliant use of Micron‑approved AI tools to augment verification activities, improve execution efficiency, and support continuous improvement.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.