Senior Memory circuit design verification engineer

1840 Micron Tech. OP India LLP; Hyderabad; On-site; INR 900,000 - 1,500,000; Full time

Job summary

1840 Micron Tech. OP India LLP in Hyderabad is seeking a professional for verification and analysis of sophisticated full chip designs. The role emphasizes collaboration with experienced design teams globally.

The ideal candidate will have a background in DRAM and will develop test cases to enhance verification for advanced memory technologies. A degree in Electronics Engineering is required. Join us to innovate at high speeds, providing essential support for developing new verification flows.

Responsibilities

• Guide and set the direction for the verification effort within your areas of expertise.
• Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs.
• Develop test cases/stimulus to increase functional coverage for DRAM and emerging memory architectures.
• Participate in developing verification methodology and environments for sophisticated products.
• Collaborate with international colleagues on developing new verification flows.
• Develop and maintain test benches and run regressions for coverage analysis.

Skills

Experience in DRAM, SRAM or other memory-related fields

Experience in python scripting

Experience in timings analysis

Setup/Hold and critical data path timing analysis

Experience using AI-assisted tools for verification productivity

Good communication skills

Exposure to gate level simulations and logic schematic analysis

Analytical capability for complex CMOS and/or gate level circuit designs

Proficient with Spice and Verilog simulations

Education

Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Unique Opportunities

Complete ownership of verification and end‑to‑end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5, LPDDR5, DDR6 and LPDDR6 that can operate at high speeds of up to 9600 MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi‑functional tasks that can widen your skills.

Responsibilities

Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre‑silicon full chip designs. Develop test cases/stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co‑work with international colleagues on developing new verification flows to take on the challenges in design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Ability to identify verification pain points suitable for AI‑based automation and collaborate with cross‑functional teams to deploy scalable solutions.

Qualifications & Skills

• Experience in DRAM, SRAM or other memory related fields
• Experience in python scripting
• Experience in timings analysis
• Setup/Hold and critical data path timing analysis
• Experience using AI‑assisted tools to improve verification productivity, with a strong emphasis on correctness, validation, and responsible use of enterprise‑approved AI systems
• Good communication skills and ability to work well in a team
• Exposure to gate level simulations (with delays) and logic schematic analysis
• Analytical capability for complex CMOS and/or gate level circuit designs
• Proficient with Spice and Verilog simulations

Education

Bachelors or Post Graduate Degree in Electronics Engineering or related engineering field required.

EEO Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.