Principal Verification Engineer, Design

Micron Technology, Inc; Hyderabad; On-site; INR 3,000,000 - 6,000,000; Full time

Job summary

Micron Technology, Inc. is seeking a Principal Verification Engineer, Design to lead full‑chip functional verification for non‑volatile memory designs.

You will develop verification plans, build SystemVerilog test benches, and support assertions with coverage‑driven methods toward tape‑out. The role emphasizes collaboration with the digital design team and model users, with opportunities to apply AI‑assisted techniques to improve efficiency.

Qualifications

• MS or BS degree in Electrical or Computer Engineering, or equivalent.
• 7–15 years of experience developing verification collateral in Verilog, SystemVerilog and UVM.
• UVM proficiency is required.
• Experience with complex coverage‑driven random constraint UVM environments.
• Ability to build complex UVM environments from scratch.
• Deep knowledge of circuit design, digital logic, and verification methodology.
• Understanding of Verilog RTL coding and SystemVerilog object‑oriented language.
• Good knowledge of programming languages such as C++, and scripting languages like TCL and PERL.

Responsibilities

• Full-chip functional verification on Micron’s non-volatile memory design projects.
• Develop verification plans by thoroughly understanding design specs for various designs.
• Design test benches in System Verilog targeting complete functionality coverage.
• Support System Verilog assertion and coverage-driven methodology.
• Improve design verification methodology.
• Run directed and constrained‑random verification tests.
• Collaborate with digital design team to debug test cases and deliver functionally accurate designs.
• Provide technical support to internal and external model users.

Skills

UVM proficiency

Verilog

SystemVerilog

C++

TCL

PERL

Education

MS or BS in Electrical or Computer Engineering

Job description

Principal Verification Engineer, Design

Req. ID: JR103584

Responsibilities

• Full-chip functional verification on Micron’s non-volatile memory design projects
• Develop verification plans by thoroughly understanding design specs for various designs
• Design test benches in System Verilog targeting complete functionality coverage
• Support System Verilog assertion and coverage-driven methodology
• Improve design verification methodology
• Run directed and constrained‐random verification tests
• Write relevant cover points for design corner cases
• Collaborate with digital design team to debug test cases and deliver functionally accurate designs
• Close coverage measures to identify verification holes and show progress toward tape‑out
• Develop Micron’s NAND Flash behavioral models in System Verilog
• Provide technical support to internal and external model users
• Complete verification on Micron’s NAND Flash models based on design datasheet
• Collaborate with Application engineers on design datasheet and model requirements
• Drive innovation into future Memory generations within a multifaceted work environment
• Leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies
• Leverage AI tools to automate the tools and workflow
• Apply Artificial Intelligence in workflows to improve build efficiency

Minimum Qualifications

• MS or BS degree in Electrical or Computer Engineering, or equivalent
• 7 – 15 years of experience developing verification collateral in Verilog, System Verilog and UVM
• UVM proficiency is required
• Experience with complex coverage‑driven random constraint UVM environments
• Ability to build complex UVM environments from scratch
• Deep knowledge of circuit design, digital logic, and logic verification methodology
• Understanding of Verilog RTL coding and System Verilog object‑oriented language
• Good knowledge of programming languages such as C++, and scripting languages like TCL and PERL

Job Profile(s)

• Semiconductor Design Engineer 5

Relocation level: TBD

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.