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Cadence Design Systems India Pvt Ltd in Bengaluru is seeking a Design Engineer II to join a dynamic team developing physical layer IPs for high-speed SERDES. The role involves firmware development from architecture through verification and customer deployment.
You will collaborate with PHY architects, implement firmware features, and contribute to FuSa compliant firmware, with opportunities to influence hardware/firmware integration and system validation.
Design Engineer II At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design Engineer II This is an opportunity to join a dynamic and growing team of experienced engineers developing physical layer IP’s for industry-standard high-speed serial-link protocols. The successful candidate will ideally be a highly motivated self-starter who can work independently to complete assigned tasks and collaborate with other members to achieve project milestones. It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES - from architecture development to implementation, verification, testing and customer deployment.
We’re doing work that matters. Help us solve what others can’t. Experience Level Mid Level