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Cadence Design Systems, Inc. in Bengaluru invites a Firmware Engineer II to join a dynamic team developing physical layer IPs for high-speed SERDES.
You will collaborate with PHY digital and mixed-signal architects to design firmware features and drive implementation from architecture through verification and deployment. The role requires strong C/C++ and Python skills, solid problem-solving and communication, and exposure to FuSa compliance, silicon validation, and digital verification tools.