Lead Analog Mixed Signal Verification Engineer

Ciliconchip Circuit; Bangalore Rural; Vor Ort; INR 1.000.000 - 1.500.000; Vollzeit

Zusammenfassung

A semiconductor company in Bangalore Rural is seeking an experienced engineer with 5 to 8 years in AMS verification and simulation. The role involves running and debugging SPICE-based simulations, analyzing results, and leading a team of engineers. Applicants should have strong fundamentals in both analog and digital design, hands-on experience with relevant tools, and a collaborative work style. The position offers opportunities to improve simulation workflows and debug processes.

Qualifikationen

• 5 to 8 years of relevant experience in AMS verification, simulation, or debug.
• Strong background in Analog and Digital concepts.
• Hands-on experience with SPICE and digital simulation tools.

Aufgaben

• Run and debug SPICE-based and digital simulations for AMS/SoC IPs.
• Analyze results and identify root cause for functional mismatches.
• Document verification findings and supervise a small team.

Kenntnisse

AMS verification / simulation / debug

Analog and Digital concepts

Verilog / SystemVerilog

SPICE and digital simulation tools

Waveform/Analysis tools

Collaborative communication

Tools

Synopsys XA

Cadence DiscoveryAMS

WaveView

Jobbeschreibung

• Run and debug SPICE-based and digital simulations for AMS/SoC IPs and subsystems.
• Understand analog and digital design intent, review simulation setups, and ensure correct test conditions.
• Analyze results using waveform/debug tools and identify root cause for functional mismatches.
• Work with designers to resolve analog/digital interface issues, model issues, and corner-case failures.
• Use simulation and waveform tools to speed up debug and improve verification turnaround time.
• Contribute to improving simulation workflows (run scripts, log parsing, automation, regression stability).
• Support mixed domain / co-simulation activities where applicable (e.g., SPICE + digital).
• Document verification findings, debug notes, and simulation methodology updates.
• Supervise, train, lead small team of 5 to 10 engineers

Required Qualifications:

• 5 to 8 years of relevant experience in AMS verification / simulation / debug.
• Strong fundamentals of Analog and Digital concepts. Good working knowledge of Verilog / SystemVerilog concepts (test/control, connectivity, modeling).
• Hands-on experience with SPICE and digital simulation tools and debug environments.
• Ability to understand simulation environments and debug analog/digital design-related issues.
• Comfortable working in a collaborative team setup with clear communication.
• Waveform/Analysis: WaveView (or equivalent)
• AMS verification Tools (Synopsys XA, Cadence DiscoveryAMS)