IP Verification Engineer

ACL Digital

Bengaluru

On-site

INR 800,000 - 1,200,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

A leading company in semiconductor manufacturing seeks an IP Verification Engineer specializing in UVM verification. This role involves system-level performance verification, traffic patterns analysis, and debugging. Candidates should possess a degree in engineering and experience with AXI4 configurations. Interested applicants are encouraged to send their CVs.

Qualifications

Qualifications: B.E/M.E/M.Tech required.
Expertise in AXI4 bus protocol and NOC protocol.
Experience with multi-master, multi-slave AXI4 configurations.

Responsibilities

SystemVerilog-based UVM verification, behavioral modeling of functional blocks.
Develop and execute testbenches to validate model functionality.
Setup verification environment and run simulations.

Skills

SystemVerilog

UVM Functional verification

Behavioral modeling

AXI4 bus protocol

Network On Chip

Debugging

Education

B.E/M.E/M.Tech

Tools

VCS

Questa

Xcelium

Riviera

Job description

Direct message the job poster from ACL Digital

IP Verification Engineer – UVM verification

Job Description: SystemVerilog-based UVM Functional verification, behavioral modeling of functional blocks, system-level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol and Network On Chip (NOC) protocol. Experience with multi-master, multi-slave AXI4 configurations. Knowledge of DRAM memory controllers.

Develop and execute testbenches to validate model functionality, participate in system-level testing and debugging.

Basic Job Deliverables: Setup verification environment and run simulations using VCS, Questa, Xcelium, Riviera.

Qualifications: B.E/M.E/M.Tech

Interested candidates can share their CVs to sharmila.b@acldigital.com

Seniority level