IC Verification Engineer

Broadcom; Bengaluru; On-site; INR 3,500,000 - 5,500,000; Full time

Job summary

Broadcom is seeking an experienced Verification Architect to design scalable testbenches and drive full ASIC verification cycles in Bengaluru. You will lead test plans, functional coverage, and pseudo-random testing while mentoring junior engineers.

Must have hands-on expertise in SystemVerilog, UVM/VMM, and complex protocols like PCIe. Prior experience across architecture to tapeout with verification focus is essential for this role at Broadcom.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics or equivalent.
• 10+ years of experience in developing complex verification environments, test plans and functional coverage.
• Experience across full ASIC cycle from architecture to tapeout with verification focus.

Responsibilities

• Architect and develop scalable reusable testbench environments using verification methodologies.
• Drive test plans for Block/Core/SOC and write functional coverage for these features.
• Build pseudo-random tests to verify and reach full functional coverage and bring verification to closure.
• Debug regression failures, analyze functional coverage gaps and improve tests to cover gaps.
• Mentor junior engineers and guide team members.
• Lead the documentation of verification strategy including test plans and verification environment; lead reviews with design/architecture.
• Drive verification quality and efficiency improvements.

Skills

SystemVerilog

UVM/VMM

Debugging

Testbench development

Mentoring

PCI Express protocol

Python

Makefiles

Education

Bachelor's degree in Electrical/Electronics or equivalent

Master's degree in Electrical/Electronics or equivalent

Tools

Makefiles

Job description

Job Description:

Job Description

• Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies.
• Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
• Work with other members of the team, guide/mentor junior team members
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
• Driver Verification quality and Efficiency improvements

Mandatory Requirements:

• Bachelors degree in Electrical/Electronics/Equivalent with 12+ years of experience of Masters degree in Electrical/Electronics/Equivalent with 10+ years of experience
• Decade+ experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing
• Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification
• Very proficient in System Verilog and Verification Methodologies like UVM/VMM
• Good debug skills in analyzing regression failures and understanding of complex designs
• A good understanding of a complex protocol like PCI Express or other multi-layered protocol
• Work with the team and mentor junior engineers

These requirements are a plus:

• Experience in PCIe protocol
• Scripting knowledge of Python or Perl
• Comfort with Makefiles
• Experience with Verifying with other protocols like AXI

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.