Hiring For Design Verification Engineer

Tech Mahindra; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

Tech Mahindra in Bengaluru is hiring a Design Verification and GLS Engineer with 4 to 12 years of experience. Immediate to 30 days notice period.

The role requires developing directed and constrained-random testcases, debugging RTL and gate-level simulations, and enhancing verification productivity using UVM, SystemVerilog, and PCIe protocol expertise, with exposure to EDA tools like VCS and Verdi.

Qualifications

• Proficient in SystemVerilog
• Hands-on experience with UVM
• Experience with EDA tools such as VCS, Verdi
• Experience debugging RTL and gate-level simulations
• Strong knowledge of PCIe protocol

Responsibilities

• Develop directed and constrained-random test cases
• Debug failures and root-cause issues across RTL, testbench, and tools
• RTL as well as gate-level simulations
• Automate regression flows and improve verification productivity

Skills

SystemVerilog

UVM

Verdi

PCIe protocol

Python/Perl/Shell scripting

Tools

VCS

Verdi

Job description

Hi Everyone

We are hiring For Design Verification and GLS Engineer

Exp: 4 to 12 Years

Np: Immediate to 30 days

Key skills: UVM, SV, Verilog, High speed protocols and Power Management (Plus advantage)

Key Responsibilities

• Develop directed and constrained-random testcases
• Debug failures and root-cause issues across RTL, testbench, and tools
• RTL as well as Gate level simulations
• Automate regression flows and improve verification productivity

Required Skills & Qualifications

Technical Skills

• Good knowledge of SystemVerilog
• Hands-on experience with UVM (Universal Verification Methodology)
• Experience with EDA tools (e.g., VCS, Verdi)
• Experience in debugging RTL and gate level simulation issues
• Good knowledge of PCIe protocol

Programming/Scripting

• Proficiency in Python/Perl/Shell scripting for automation